Datasheet Texas Instruments TLV2782 — Datenblatt
| Hersteller | Texas Instruments |
| Serie | TLV2782 |
Dual 1,8V RRIO, 8MHz Verstärker
Datenblätter
Family of 1.8 V Hi-Speed Rail-to-Rail I/O Operational Amplifiers with Shutdown datasheet
PDF, 1.8 Mb, Revision: E, Datei veröffentlicht: Jan 14, 2005
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Status
| TLV2782CD | TLV2782CDG4 | TLV2782CDGK | TLV2782CDGKR | TLV2782CDGKRG4 | TLV2782CDR | TLV2782ID | TLV2782IDGK | TLV2782IDGKR | TLV2782IDR | TLV2782IP | |
|---|---|---|---|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | Yes | Yes | No | No | No | Yes | No | Yes | Yes | No |
Verpackung
| TLV2782CD | TLV2782CDG4 | TLV2782CDGK | TLV2782CDGKR | TLV2782CDGKRG4 | TLV2782CDR | TLV2782ID | TLV2782IDGK | TLV2782IDGKR | TLV2782IDR | TLV2782IP | |
|---|---|---|---|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 |
| Pin | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
| Package Type | D | D | DGK | DGK | DGK | D | D | DGK | DGK | D | P |
| Industry STD Term | SOIC | SOIC | VSSOP | VSSOP | VSSOP | SOIC | SOIC | VSSOP | VSSOP | SOIC | PDIP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDIP-T |
| Package QTY | 75 | 75 | 80 | 2500 | 2500 | 2500 | 75 | 80 | 2500 | 2500 | 50 |
| Carrier | TUBE | TUBE | TUBE | LARGE T&R | LARGE T&R | LARGE T&R | TUBE | TUBE | LARGE T&R | LARGE T&R | TUBE |
| Device Marking | 2782C | 2782C | ADL | ADL | ADL | 2782C | 2782I | ADM | ADM | 2782I | TLV2782IP |
| Width (mm) | 3.91 | 3.91 | 3 | 3 | 3 | 3.91 | 3.91 | 3 | 3 | 3.91 | 6.35 |
| Length (mm) | 4.9 | 4.9 | 3 | 3 | 3 | 4.9 | 4.9 | 3 | 3 | 4.9 | 9.81 |
| Thickness (mm) | 1.58 | 1.58 | .97 | .97 | .97 | 1.58 | 1.58 | .97 | .97 | 1.58 | 3.9 |
| Pitch (mm) | 1.27 | 1.27 | .65 | .65 | .65 | 1.27 | 1.27 | .65 | .65 | 1.27 | 2.54 |
| Max Height (mm) | 1.75 | 1.75 | 1.07 | 1.07 | 1.07 | 1.75 | 1.75 | 1.07 | 1.07 | 1.75 | 5.08 |
| Mechanical Data | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen |
Parameter
| Parameters / Models | TLV2782CD | TLV2782CDG4 | TLV2782CDGK | TLV2782CDGKR | TLV2782CDGKRG4 | TLV2782CDR | TLV2782ID | TLV2782IDGK | TLV2782IDGKR | TLV2782IDR | TLV2782IP |
|---|---|---|---|---|---|---|---|---|---|---|---|
| Additional Features | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A |
| Architecture | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS |
| CMRR(Min), dB | 55 | 55 | 55 | 55 | 55 | 55 | 55 | 55 | 55 | 55 | 55 |
| CMRR(Typ), dB | 80 | 80 | 80 | 80 | 80 | 80 | 80 | 80 | 80 | 80 | 80 |
| GBW(Typ), MHz | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
| Input Bias Current(Max), pA | 15 | 15 | 15 | 15 | 15 | 15 | 15 | 15 | 15 | 15 | 15 |
| Iq per channel(Max), mA | 0.77 | 0.77 | 0.77 | 0.77 | 0.77 | 0.77 | 0.77 | 0.77 | 0.77 | 0.77 | 0.77 |
| Iq per channel(Typ), mA | 0.65 | 0.65 | 0.65 | 0.65 | 0.65 | 0.65 | 0.65 | 0.65 | 0.65 | 0.65 | 0.65 |
| Number of Channels | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 |
| Offset Drift(Typ), uV/C | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
| Operating Temperature Range, C | -40 to 125,0 to 70 | -40 to 125,0 to 70 | -40 to 125,0 to 70 | -40 to 125,0 to 70 | -40 to 125,0 to 70 | -40 to 125,0 to 70 | -40 to 125,0 to 70 | -40 to 125,0 to 70 | -40 to 125,0 to 70 | -40 to 125,0 to 70 | -40 to 125,0 to 70 |
| Output Current(Typ), mA | 17 | 17 | 17 | 17 | 17 | 17 | 17 | 17 | 17 | 17 | 17 |
| Package Group | SOIC | SOIC | VSSOP | VSSOP | VSSOP | SOIC | SOIC | VSSOP | VSSOP | SOIC | PDIP |
| Package Size: mm2:W x L, PKG | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | See datasheet (PDIP) |
| Rail-to-Rail | In,Out | In,Out | In,Out | In,Out | In,Out | In,Out | In,Out | In,Out | In,Out | In,Out | In,Out |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Slew Rate(Typ), V/us | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 |
| Total Supply Voltage(Max), +5V=5, +/-5V=10 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 |
| Total Supply Voltage(Min), +5V=5, +/-5V=10 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 |
| Vn at 1kHz(Typ), nV/rtHz | 18 | 18 | 18 | 18 | 18 | 18 | 18 | 18 | 18 | 18 | 18 |
| Vos (Offset Voltage @ 25C)(Max), mV | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 |
Öko-Plan
| TLV2782CD | TLV2782CDG4 | TLV2782CDGK | TLV2782CDGKR | TLV2782CDGKRG4 | TLV2782CDR | TLV2782ID | TLV2782IDGK | TLV2782IDGKR | TLV2782IDR | TLV2782IP | |
|---|---|---|---|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
| Pb Free | Yes |
Modellreihe
Serie: TLV2782 (11)
Herstellerklassifikation
- Semiconductors> Amplifiers> Operational Amplifiers (Op Amps)> Precision Op Amps