Datasheet Texas Instruments TLV2544Q — Datenblatt

HerstellerTexas Instruments
SerieTLV2544Q
Datasheet Texas Instruments TLV2544Q

Automobilkatalog 12-Bit 200 kSPS ADC Ser. Out, Auto Pwrdn (S / W und H / W), Low Power

Datenblätter

3-V to 5.5-V, 12-Bit, 200-KSPS, 4-/8-Channel, Low-Power Serial Analog-to-Digital datasheet
PDF, 1.6 Mb, Revision: F, Datei veröffentlicht: Oct 7, 2009
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Preise

Status

TLV2544QDTLV2544QDG4TLV2544QDR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoNo

Verpackung

TLV2544QDTLV2544QDG4TLV2544QDR
N123
Pin161616
Package TypeDDD
Industry STD TermSOICSOICSOIC
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY40402500
CarrierTUBETUBELARGE T&R
Device MarkingTLV2544QDV2544QDTLV2544QD
Width (mm)3.913.913.91
Length (mm)9.99.99.9
Thickness (mm)1.581.581.58
Pitch (mm)1.271.271.27
Max Height (mm)1.751.751.75
Mechanical DataHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsTLV2544QD
TLV2544QD
TLV2544QDG4
TLV2544QDG4
TLV2544QDR
TLV2544QDR
# Input Channels444
Analog Voltage AVDD(Max), V5.55.55.5
Analog Voltage AVDD(Min), V333
ArchitectureSARSARSAR
Digital Supply(Max), V5.55.55.5
Digital Supply(Min), V333
INL(Max), +/-LSB111
Input Range(Max), V5.55.55.5
Input TypeSingle-EndedSingle-EndedSingle-Ended
Integrated FeaturesOscillatorOscillatorOscillator
InterfaceSPISPISPI
Multi-Channel ConfigurationMultiplexedMultiplexedMultiplexed
Operating Temperature Range, C-40 to 125-40 to 125-40 to 125
Package GroupSOICSOICSOIC
Package Size: mm2:W x L, PKG16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)
Power Consumption(Typ), mW3.33.33.3
RatingCatalogCatalogCatalog
Reference ModeExt,IntExt,IntExt,Int
Resolution, Bits121212
SINAD, dB717171
SNR, dB717171
Sample Rate (max), SPS200kSPS200kSPS200kSPS
Sample Rate(Max), MSPS0.20.20.2
THD(Typ), dB-82-82-82

Öko-Plan

TLV2544QDTLV2544QDG4TLV2544QDR
RoHSCompliantCompliantCompliant

Anwendungshinweise

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Modellreihe

Serie: TLV2544Q (3)

Herstellerklassifikation

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)