Datasheet Texas Instruments THS6182 — Datenblatt

HerstellerTexas Instruments
SerieTHS6182
Datasheet Texas Instruments THS6182

ADSL-Leitungstreiber mit geringer Verlustleistung

Datenblätter

Low Power Dissipation ADSL Line Driver datasheet
PDF, 1.8 Mb, Revision: H, Datei veröffentlicht: Jun 11, 2007
Auszug aus dem Dokument

Preise

Status

THS6182DTHS6182DWTHS6182DWPTHS6182DWPRTHS6182DWPRG4THS6182RHFRTHS6182RHFT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoNoNoNoYesNo

Verpackung

THS6182DTHS6182DWTHS6182DWPTHS6182DWPRTHS6182DWPRG4THS6182RHFRTHS6182RHFT
N1234567
Pin16202020202424
Package TypeDDWDWPDWPDWPRHFRHF
Industry STD TermSOICSOICHSOICHSOICHSOICVQFNVQFN
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PQFP-NR-PQFP-N
Package QTY402525200020003000250
CarrierTUBETUBETUBELARGE T&RLARGE T&RLARGE T&RSMALL T&R
Device MarkingTHS6182THS6182THS6182THS6182THS618261826182
Width (mm)3.917.57.527.527.5244
Length (mm)9.912.812.8212.8212.8255
Thickness (mm)1.582.352.552.552.55.9.9
Pitch (mm)1.271.271.271.271.27.5.5
Max Height (mm)1.752.652.652.652.6511
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Parameter

Parameters / ModelsTHS6182D
THS6182D
THS6182DW
THS6182DW
THS6182DWP
THS6182DWP
THS6182DWPR
THS6182DWPR
THS6182DWPRG4
THS6182DWPRG4
THS6182RHFR
THS6182RHFR
THS6182RHFT
THS6182RHFT
2nd Harmonic, dBc88888888888888
3rd Harmonic, dBc107107107107107107107
@ MHz1111111
Acl, min spec gain, V/V1111111
Additional FeaturesN/AN/AN/AN/AN/AN/AN/A
ArchitectureCurrent FBCurrent FBCurrent FBCurrent FBCurrent FBCurrent FBCurrent FB
BW @ Acl, MHz100100100100100100100
CMRR(Min), dB48484848484848
CMRR(Typ), dB54545454545454
GBW(Typ), MHz100100100100100100100
Input Bias Current(Max), pA15000000150000001500000015000000150000001500000015000000
Iq per channel(Max), mA12.512.512.512.512.512.512.5
Iq per channel(Typ), mA11.511.511.511.511.511.511.5
Number of Channels2222222
Offset Drift(Typ), uV/C50505050505050
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Current(Typ), mA600600600600600600600
Package GroupSOICSOICSO PowerPADSO PowerPADSO PowerPADVQFNVQFN
Package Size: mm2:W x L, PKG16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)20SO PowerPAD: 133 mm2: 10.405 x 12.825(SO PowerPAD)20SO PowerPAD: 133 mm2: 10.405 x 12.825(SO PowerPAD)20SO PowerPAD: 133 mm2: 10.405 x 12.825(SO PowerPAD)24VQFN: 20 mm2: 4 x 5(VQFN)24VQFN: 20 mm2: 4 x 5(VQFN)
Rail-to-RailNoNoNoNoNoNoNo
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Slew Rate(Typ), V/us450450450450450450450
Total Supply Voltage(Max), +5V=5, +/-5V=1033333333333333
Total Supply Voltage(Min), +5V=5, +/-5V=108888888
Vn at 1kHz(Typ), nV/rtHz13131313131313
Vn at Flatband(Typ), nV/rtHz3.23.23.23.23.23.23.2
Vos (Offset Voltage @ 25C)(Max), mV20202020202020

Öko-Plan

THS6182DTHS6182DWTHS6182DWPTHS6182DWPRTHS6182DWPRG4THS6182RHFRTHS6182RHFT
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliant

Anwendungshinweise

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  • Noise Analysis for High Speed Op Amps (Rev. A)
    PDF, 256 Kb, Revision: A, Datei veröffentlicht: Jan 17, 2005
    As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu

Modellreihe

Herstellerklassifikation

  • Semiconductors> Amplifiers> Operational Amplifiers (Op Amps)> High-Speed Op Amps (>=50MHz)