Datasheet Texas Instruments SN74LVTH241 — Datenblatt

HerstellerTexas Instruments
SerieSN74LVTH241
Datasheet Texas Instruments SN74LVTH241

3,3-V-ABT-Oktalpuffer / Treiber mit 3-Zustands-Ausgängen

Datenblätter

SN54LVTH241, SN74LVTH241 datasheet
PDF, 879 Kb, Revision: K, Datei veröffentlicht: Oct 13, 2003
Auszug aus dem Dokument

Preise

Status

SN74LVTH241DBRSN74LVTH241DWSN74LVTH241DWRSN74LVTH241DWRG4SN74LVTH241PWSN74LVTH241PWE4SN74LVTH241PWG4SN74LVTH241PWR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNo

Verpackung

SN74LVTH241DBRSN74LVTH241DWSN74LVTH241DWRSN74LVTH241DWRG4SN74LVTH241PWSN74LVTH241PWE4SN74LVTH241PWG4SN74LVTH241PWR
N12345678
Pin2020202020202020
Package TypeDBDWDWDWPWPWPWPW
Industry STD TermSSOPSOICSOICSOICTSSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY200025200020007070702000
CarrierLARGE T&RTUBELARGE T&RLARGE T&RTUBETUBETUBELARGE T&R
Device MarkingLXH241LVTH241LVTH241LVTH241LXH241LXH241LXH241LXH241
Width (mm)5.37.57.57.54.44.44.44.4
Length (mm)7.212.812.812.86.56.56.56.5
Thickness (mm)1.952.352.352.351111
Pitch (mm).651.271.271.27.65.65.65.65
Max Height (mm)22.652.652.651.21.21.21.2
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Parameter

Parameters / ModelsSN74LVTH241DBR
SN74LVTH241DBR
SN74LVTH241DW
SN74LVTH241DW
SN74LVTH241DWR
SN74LVTH241DWR
SN74LVTH241DWRG4
SN74LVTH241DWRG4
SN74LVTH241PW
SN74LVTH241PW
SN74LVTH241PWE4
SN74LVTH241PWE4
SN74LVTH241PWG4
SN74LVTH241PWG4
SN74LVTH241PWR
SN74LVTH241PWR
Bits88888888
F @ Nom Voltage(Max), Mhz160160160160160160160160
ICC @ Nom Voltage(Max), mA0.0050.0050.0050.0050.0050.0050.0050.005
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA-32/64-32/64-32/64-32/64-32/64-32/64-32/64-32/64
Package GroupSSOPSOICSOICSOICTSSOPTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG20SSOP: 56 mm2: 7.8 x 7.2(SSOP)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNo
Technology FamilyLVTLVTLVTLVTLVTLVTLVTLVT
VCC(Max), V3.63.63.63.63.63.63.63.6
VCC(Min), V2.72.72.72.72.72.72.72.7
Voltage(Nom), V3.33.33.33.33.33.33.33.3
tpd @ Nom Voltage(Max), ns4.14.14.14.14.14.14.14.1

Öko-Plan

SN74LVTH241DBRSN74LVTH241DWSN74LVTH241DWRSN74LVTH241DWRG4SN74LVTH241PWSN74LVTH241PWE4SN74LVTH241PWG4SN74LVTH241PWR
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

Anwendungshinweise

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, Revision: A, Datei veröffentlicht: Mar 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, Datei veröffentlicht: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
  • Bus-Hold Circuit
    PDF, 418 Kb, Datei veröffentlicht: Feb 5, 2001
    When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of

Modellreihe

Herstellerklassifikation

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Non-Inverting Buffer/Driver