Datasheet Texas Instruments SN74AUC00 — Datenblatt

HerstellerTexas Instruments
SerieSN74AUC00
Datasheet Texas Instruments SN74AUC00

Vierfaches Positiv-NAND-Gatter mit 2 Eingängen

Datenblätter

SN74AUC00 datasheet
PDF, 569 Kb, Revision: A, Datei veröffentlicht: Mar 28, 2005
Auszug aus dem Dokument

Preise

Status

SN74AUC00RGYRSN74AUC00RGYRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYes

Verpackung

SN74AUC00RGYRSN74AUC00RGYRG4
N12
Pin1414
Package TypeRGYRGY
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY30003000
CarrierLARGE T&RLARGE T&R
Device MarkingMS00MS00
Width (mm)3.53.5
Length (mm)3.53.5
Thickness (mm).9.9
Pitch (mm).5.5
Max Height (mm)11
Mechanical DataHerunterladenHerunterladen

Parameter

Parameters / ModelsSN74AUC00RGYR
SN74AUC00RGYR
SN74AUC00RGYRG4
SN74AUC00RGYRG4
Bits44
F @ Nom Voltage(Max), Mhz250250
ICC @ Nom Voltage(Max), mA0.010.01
Operating Temperature Range, C-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA9/-99/-9
Package GroupVQFNVQFN
Package Size: mm2:W x L, PKG14VQFN: 12 mm2: 3.5 x 3.5(VQFN)14VQFN: 12 mm2: 3.5 x 3.5(VQFN)
RatingCatalogCatalog
Schmitt TriggerNoNo
Technology FamilyAUCAUC
VCC(Max), V2.72.7
VCC(Min), V0.80.8
Voltage(Nom), V0.8,1.2,1.5,1.8,2.50.8,1.2,1.5,1.8,2.5
tpd @ Nom Voltage(Max), ns4.7,3.6,2.6,2,1.14.7,3.6,2.6,2,1.1

Öko-Plan

SN74AUC00RGYRSN74AUC00RGYRG4
RoHSCompliantCompliant

Anwendungshinweise

  • Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus Devices
    PDF, 374 Kb, Datei veröffentlicht: Mar 21, 2003
    System designers are continuously seeking ways to improve signal integrity, increase speed, and reduce power consumption in personal computers, telecommunication equipment, and other electronic systems. The Texas Instruments (TI) next-generation Advanced Ultra-low-voltage CMOS (AUC) octals and Widebus(TM) devices are designed to achieve these goals. These devices are designed for a 0.8-V to 2.7-V

Modellreihe

Serie: SN74AUC00 (2)

Herstellerklassifikation

  • Semiconductors> Logic> Gate> NAND Gate