Datasheet Texas Instruments SN74ALVC00 — Datenblatt

HerstellerTexas Instruments
SerieSN74ALVC00
Datasheet Texas Instruments SN74ALVC00

Vierfaches Positiv-NAND-Gatter mit 2 Eingängen

Datenblätter

SN74ALVC00 datasheet
PDF, 868 Kb, Revision: G, Datei veröffentlicht: Jun 29, 2004
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Preise

Status

SN74ALVC00DSN74ALVC00DE4SN74ALVC00DG4SN74ALVC00DGVRSN74ALVC00DRSN74ALVC00DRG4SN74ALVC00NSRSN74ALVC00PWRSN74ALVC00PWRE4SN74ALVC00PWRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNoNoNo

Verpackung

SN74ALVC00DSN74ALVC00DE4SN74ALVC00DG4SN74ALVC00DGVRSN74ALVC00DRSN74ALVC00DRG4SN74ALVC00NSRSN74ALVC00PWRSN74ALVC00PWRE4SN74ALVC00PWRG4
N12345678910
Pin14141414141414141414
Package TypeDDDDGVDDNSPWPWPW
Industry STD TermSOICSOICSOICTVSOPSOICSOICSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY5050502000250025002000200020002000
CarrierTUBETUBETUBELARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&R
Device MarkingALVC00ALVC00ALVC00VA00ALVC00ALVC00ALVC00VA00VA00VA00
Width (mm)3.913.913.914.43.913.915.34.44.44.4
Length (mm)8.658.658.653.68.658.6510.3555
Thickness (mm)1.581.581.581.051.581.581.95111
Pitch (mm)1.271.271.27.41.271.271.27.65.65.65
Max Height (mm)1.751.751.751.21.751.7521.21.21.2
Mechanical DataHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsSN74ALVC00D
SN74ALVC00D
SN74ALVC00DE4
SN74ALVC00DE4
SN74ALVC00DG4
SN74ALVC00DG4
SN74ALVC00DGVR
SN74ALVC00DGVR
SN74ALVC00DR
SN74ALVC00DR
SN74ALVC00DRG4
SN74ALVC00DRG4
SN74ALVC00NSR
SN74ALVC00NSR
SN74ALVC00PWR
SN74ALVC00PWR
SN74ALVC00PWRE4
SN74ALVC00PWRE4
SN74ALVC00PWRG4
SN74ALVC00PWRG4
Bits4444444444
F @ Nom Voltage(Max), Mhz100100100100100100100100100100
ICC @ Nom Voltage(Max), mA0.010.010.010.010.010.010.010.010.010.01
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-2424/-2424/-2424/-2424/-2424/-2424/-2424/-24
Package GroupSOICSOICSOICTVSOPSOICSOICSOTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14TVSOP: 23 mm2: 6.4 x 3.6(TVSOP)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SO: 80 mm2: 7.8 x 10.2(SO)14TSSOP: 32 mm2: 6.4 x 5(TSSOP)14TSSOP: 32 mm2: 6.4 x 5(TSSOP)14TSSOP: 32 mm2: 6.4 x 5(TSSOP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNoNo
Technology FamilyALVCALVCALVCALVCALVCALVCALVCALVCALVCALVC
VCC(Max), V3.63.63.63.63.63.63.63.63.63.6
VCC(Min), V1.651.651.651.651.651.651.651.651.651.65
Voltage(Nom), V1.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.31.8,2.5,2.7,3.3
tpd @ Nom Voltage(Max), ns4.4,2.8,3.2,34.4,2.8,3.2,34.4,2.8,3.2,34.4,2.8,3.2,34.4,2.8,3.2,34.4,2.8,3.2,34.4,2.8,3.2,34.4,2.8,3.2,34.4,2.8,3.2,34.4,2.8,3.2,3

Öko-Plan

SN74ALVC00DSN74ALVC00DE4SN74ALVC00DG4SN74ALVC00DGVRSN74ALVC00DRSN74ALVC00DRG4SN74ALVC00NSRSN74ALVC00PWRSN74ALVC00PWRE4SN74ALVC00PWRG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

Anwendungshinweise

  • TI SN74ALVC16835 Component Specification Analysis for PC100
    PDF, 43 Kb, Datei veröffentlicht: Aug 3, 1998
    The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T
  • Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)
    PDF, 96 Kb, Revision: A, Datei veröffentlicht: May 13, 1998
    Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, Revision: B, Datei veröffentlicht: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Understanding Advanced Bus-Interface Products Design Guide
    PDF, 253 Kb, Datei veröffentlicht: May 1, 1996
  • Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
    PDF, 154 Kb, Revision: A, Datei veröffentlicht: Sep 8, 1999
    In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families

Modellreihe

Herstellerklassifikation

  • Semiconductors> Logic> Gate> NAND Gate