Datasheet Texas Instruments SN74ALS114A — Datenblatt

HerstellerTexas Instruments
SerieSN74ALS114A

Dual JK Negative-Edge-Triggered Flip-Flops mit Preset, Common CLR und CLK

Datenblätter

Dual J-K Negative-Edge-Triggered F-F w/ Preset, Common Clear, & Common Clock
PDF, 70 Kb, Datei veröffentlicht: May 1, 1986

Preise

Status

SN74ALS114AN
Lifecycle StatusObsolete (Manufacturer has discontinued the production of the device)
Manufacture's Sample AvailabilityNo

Verpackung

SN74ALS114AN
N1
Pin14
Package TypeN
Industry STD TermPDIP
JEDEC CodeR-PDIP-T
Width (mm)6.35
Length (mm)19.3
Thickness (mm)3.9
Pitch (mm)2.54
Max Height (mm)5.08
Mechanical DataHerunterladen

Öko-Plan

SN74ALS114AN
RoHSNot Compliant
Pb FreeNo

Anwendungshinweise

  • Advanced Schottky (ALS and AS) Logic Families
    PDF, 1.9 Mb, Datei veröffentlicht: Aug 1, 1995
    This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using the Advanced Schottky family are given along with a brief summary of the solutions to most design decisions needed to implement systems using t

Modellreihe

Serie: SN74ALS114A (1)

Herstellerklassifikation

  • Semiconductors> Logic> Flip-Flop/Latch/Register> J-K Flip-Flop