Datasheet Texas Instruments SN74ALS113A — Datenblatt
| Hersteller | Texas Instruments |
| Serie | SN74ALS113A |
Duale JK-Flip-Flops mit negativer Flanke und Voreinstellung
Datenblätter
Dual J-K Negative-Edge-Triggered Flip-Flops With Preset
PDF, 69 Kb, Datei veröffentlicht: May 1, 1986
Preise
Status
| SN74ALS113AD | SN74ALS113ADR | SN74ALS113AN | |
|---|---|---|---|
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) | Obsolete (Manufacturer has discontinued the production of the device) | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No | No | No |
Verpackung
| SN74ALS113AD | SN74ALS113ADR | SN74ALS113AN | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 14 | 14 | 14 |
| Package Type | D | D | N |
| Industry STD Term | SOIC | SOIC | PDIP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDIP-T |
| Width (mm) | 3.91 | 3.91 | 6.35 |
| Length (mm) | 8.65 | 8.65 | 19.3 |
| Thickness (mm) | 1.58 | 1.58 | 3.9 |
| Pitch (mm) | 1.27 | 1.27 | 2.54 |
| Max Height (mm) | 1.75 | 1.75 | 5.08 |
| Mechanical Data | Herunterladen | Herunterladen | Herunterladen |
Öko-Plan
| SN74ALS113AD | SN74ALS113ADR | SN74ALS113AN | |
|---|---|---|---|
| RoHS | Not Compliant | Not Compliant | Not Compliant |
| Pb Free | No | No | No |
Anwendungshinweise
- Advanced Schottky (ALS and AS) Logic FamiliesPDF, 1.9 Mb, Datei veröffentlicht: Aug 1, 1995
This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using the Advanced Schottky family are given along with a brief summary of the solutions to most design decisions needed to implement systems using t
Modellreihe
Serie: SN74ALS113A (3)
Herstellerklassifikation
- Semiconductors> Logic> Flip-Flop/Latch/Register> J-K Flip-Flop