Datasheet Texas Instruments SN7470 — Datenblatt
| Hersteller | Texas Instruments |
| Serie | SN7470 |
AND-Gated JK-Flip-Flop mit positiver Kantenauslösung mit Peset und Clear
Datenblätter
AND-Gated J-K Positive-Edge-Triggered Flip-Flops With Preset And Clear
PDF, 239 Kb, Datei veröffentlicht: Mar 1, 1988
Preise
Status
| SN7470N | |
|---|---|
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
Verpackung
| SN7470N | |
|---|---|
| N | 1 |
| Pin | 14 |
| Package Type | N |
| Industry STD Term | PDIP |
| JEDEC Code | R-PDIP-T |
| Width (mm) | 6.35 |
| Length (mm) | 19.3 |
| Thickness (mm) | 3.9 |
| Pitch (mm) | 2.54 |
| Max Height (mm) | 5.08 |
| Mechanical Data | Herunterladen |
Öko-Plan
| SN7470N | |
|---|---|
| RoHS | Not Compliant |
| Pb Free | No |
Modellreihe
Serie: SN7470 (1)
Herstellerklassifikation
- Semiconductors> Logic> Flip-Flop/Latch/Register> J-K Flip-Flop