Datasheet Texas Instruments SN65LVDS96DGGRG4 — Datenblatt
| Hersteller | Texas Instruments |
| Serie | SN65LVDS96 |
| Artikelnummer | SN65LVDS96DGGRG4 |
Serdes (Serializer / Deserializer) Empfänger 48-TSSOP -40 bis 85
Datenblätter
LVDS Serdes Receiver datasheet
PDF, 335 Kb, Revision: H, Datei veröffentlicht: Jul 6, 2006
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Preise
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 48 |
| Package Type | DGG |
| Industry STD Term | TSSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | SN65LVDS96 |
| Width (mm) | 6.1 |
| Length (mm) | 12.5 |
| Thickness (mm) | 1.15 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Herunterladen |
Parameter
| Operating Temperature Range | -40 to 85 C |
| Output Compatibility | LVTTL |
| Package Group | TSSOP |
| Package Size: mm2:W x L | 48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP) PKG |
| Protocols | Channel-Link I |
| Rating | Catalog |
| Supply Voltage(s) | 3.3 V |
Öko-Plan
| RoHS | Compliant |
Anwendungshinweise
- LVDS Serdes 48 EVM Kit Setup And UsagePDF, 735 Kb, Datei veröffentlicht: Dec 17, 1998
This document describes the Texas Instruments (TI)(tm) LVDS Serdes 48 evaluation module (EVM) kit. The LVDS Serdes 48 EVM kit is used to evaluate and design high data throughput prototypes using the TI LVDS95 transmitter and LVDS96 receiver boards. The boards allow the designer to connect 21 bits of data and clock to the transmitter board where LVDS technology is available to serialize and transm
Modellreihe
Serie: SN65LVDS96 (4)
- SN65LVDS96DGG SN65LVDS96DGGG4 SN65LVDS96DGGR SN65LVDS96DGGRG4
Herstellerklassifikation
- Semiconductors > Interface > LVDS/M-LVDS/PECL > SerDes/Channel-Link