Datasheet Texas Instruments SN65LVDS348 — Datenblatt
| Hersteller | Texas Instruments |
| Serie | SN65LVDS348 |
Quad LVDS Empfänger mit -4 bis 5V Gleichtaktbereich
Datenblätter
Quad High-Speed Differential Receivers datasheet
PDF, 1.1 Mb, Revision: E, Datei veröffentlicht: May 5, 2004
Auszug aus dem Dokument
Status
| SN65LVDS348D | SN65LVDS348DG4 | SN65LVDS348PW | SN65LVDS348PWG4 | SN65LVDS348PWR | SN65LVDS348PWRG4 | |
|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | Yes | No | No | No | No |
Verpackung
| SN65LVDS348D | SN65LVDS348DG4 | SN65LVDS348PW | SN65LVDS348PWG4 | SN65LVDS348PWR | SN65LVDS348PWRG4 | |
|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 |
| Pin | 16 | 16 | 16 | 16 | 16 | 16 |
| Package Type | D | D | PW | PW | PW | PW |
| Industry STD Term | SOIC | SOIC | TSSOP | TSSOP | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 40 | 40 | 90 | 90 | 2000 | 2000 |
| Carrier | TUBE | TUBE | TUBE | TUBE | LARGE T&R | LARGE T&R |
| Device Marking | LVDS348 | LVDS348 | DL348 | DL348 | DL348 | DL348 |
| Width (mm) | 3.91 | 3.91 | 4.4 | 4.4 | 4.4 | 4.4 |
| Length (mm) | 9.9 | 9.9 | 5 | 5 | 5 | 5 |
| Thickness (mm) | 1.58 | 1.58 | 1 | 1 | 1 | 1 |
| Pitch (mm) | 1.27 | 1.27 | .65 | .65 | .65 | .65 |
| Max Height (mm) | 1.75 | 1.75 | 1.2 | 1.2 | 1.2 | 1.2 |
| Mechanical Data | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen |
Parameter
| Parameters / Models | SN65LVDS348D | SN65LVDS348DG4 | SN65LVDS348PW | SN65LVDS348PWG4 | SN65LVDS348PWR | SN65LVDS348PWRG4 |
|---|---|---|---|---|---|---|
| Device Type | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver |
| ESD HBM, kV | 15 | 15 | 15 | 15 | 15 | 15 |
| Function | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver |
| ICC(Max), mA | 20 | 20 | 20 | 20 | 20 | 20 |
| Input Signal | CMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL | CMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL | CMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL | CMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL | CMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL | CMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL |
| No. of Rx | 4 | 4 | 4 | 4 | 4 | 4 |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
| Output Signal | LVTTL | LVTTL | LVTTL | LVTTL | LVTTL | LVTTL |
| Package Group | SOIC | SOIC | TSSOP | TSSOP | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) |
| Protocols | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS |
| Signaling Rate, Mbps | 340 | 340 | 340 | 340 | 340 | 340 |
Öko-Plan
| SN65LVDS348D | SN65LVDS348DG4 | SN65LVDS348PW | SN65LVDS348PWG4 | SN65LVDS348PWR | SN65LVDS348PWRG4 | |
|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Anwendungshinweise
- SN65LVDS348 vs SN65LVDS349PDF, 41 Kb, Datei veröffentlicht: Oct 5, 2010
SN65LVDS348 and SN65LVDS349 are high-speed, quadruple differential receivers with a wide, common-mode, input voltage range of –4 V to 5 V. Both these devices meet or exceed the requirements of the ANSI TIA/EIA-644A standard. This document compares the two devices.
Modellreihe
Serie: SN65LVDS348 (6)
Herstellerklassifikation
- Semiconductors> Interface> LVDS/M-LVDS/ECL/CML> LVDS PHY (<800Mbps)