Datasheet Texas Instruments LP324-N — Datenblatt

Hersteller	Texas Instruments
Serie	LP324-N

Micropower Quad Operationsverstärker

Datenblätter

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PDF, 1.2 Mb, Revision: C, Datei veröffentlicht: Mar 19, 2013

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Preise

Status

	LP324M	LP324M/NOPB	LP324MT/NOPB	LP324MTX/NOPB	LP324MX/NOPB	LP324N/NOPB
Lifecycle Status	NRND (Not recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	No	Yes	No	Yes	Yes	No

Verpackung

	LP324M	LP324M/NOPB	LP324MT/NOPB	LP324MTX/NOPB	LP324MX/NOPB	LP324N/NOPB
N	1	2	3	4	5	6
Pin	14	14	14	14	14	14
Package Type	D	D	PW	PW	D	NFF
Industry STD Term	SOIC	SOIC	TSSOP	TSSOP	SOIC	PDIP
JEDEC Code	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDIP-T
Package QTY	55	55	94	2500	2500	25
Carrier	TUBE	TUBE	TUBE	LARGE T&R	LARGE T&R	TUBE
Device Marking	LP324M	LP324M	MT	MT	LP324M	LP324N
Width (mm)	3.91	3.91	4.4	4.4	3.91	6.35
Length (mm)	8.65	8.65	5	5	8.65	19.177
Thickness (mm)	1.58	1.58	1	1	1.58	3.429
Pitch (mm)	1.27	1.27	.65	.65	1.27	2.54
Max Height (mm)	1.75	1.75	1.2	1.2	1.75	5.33
Mechanical Data	Herunterladen	Herunterladen	Herunterladen	Herunterladen	Herunterladen	Herunterladen

Parameter

Parameters / Models	LP324M	LP324M/NOPB	LP324MT/NOPB	LP324MTX/NOPB	LP324MX/NOPB	LP324N/NOPB
Additional Features	N/A	N/A	N/A	N/A	N/A	N/A
Approx. Price (US$)	0.33 \| 1ku
Architecture	Bipolar	Bipolar	Bipolar	Bipolar	Bipolar	Bipolar
CMRR(Min), dB		80	80	80	80	80
CMRR(Min)(dB)	80
CMRR(Typ), dB		90	90	90	90	90
CMRR(Typ)(dB)	90
GBW(Typ), MHz		0.1	0.1	0.1	0.1	0.1
GBW(Typ)(MHz)	0.1
Input Bias Current(Max), pA		10000	10000	10000	10000	10000
Input Bias Current(Max)(pA)	10000
Iq per channel(Max), mA		0.0375	0.0375	0.0375	0.0375	0.0375
Iq per channel(Max)(mA)	0.0375
Iq per channel(Typ), mA		0.02125	0.02125	0.02125	0.02125	0.02125
Iq per channel(Typ)(mA)	0.02125
Number of Channels		4	4	4	4	4
Number of Channels(#)	4
Offset Drift(Typ), uV/C		10	10	10	10	10
Offset Drift(Typ)(uV/C)	10
Operating Temperature Range, C		0 to 70	0 to 70	0 to 70	0 to 70	0 to 70
Operating Temperature Range(C)	0 to 70
Output Current(Typ), mA		4	4	4	4	4
Output Current(Typ)(mA)	4
Package Group	SOIC	SOIC	TSSOP	TSSOP	SOIC	PDIP
Package Size: mm2:W x L, PKG		14SOIC: 52 mm2: 6 x 8.65(SOIC)	14TSSOP: 32 mm2: 6.4 x 5(TSSOP)	14TSSOP: 32 mm2: 6.4 x 5(TSSOP)	14SOIC: 52 mm2: 6 x 8.65(SOIC)	See datasheet (PDIP)
Package Size: mm2:W x L (PKG)	See datasheet (PDIP)
Rail-to-Rail	In to V-	In to V-	In to V-	In to V-	In to V-	In to V-
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
Slew Rate(Typ), V/us		0.05	0.05	0.05	0.05	0.05
Slew Rate(Typ)(V/us)	0.05
Total Supply Voltage(Max), +5V=5, +/-5V=10		32	32	32	32	32
Total Supply Voltage(Max)(+5V=5, +/-5V=10)	32
Total Supply Voltage(Min), +5V=5, +/-5V=10		3	3	3	3	3
Total Supply Voltage(Min)(+5V=5, +/-5V=10)	3
Vn at 1kHz(Typ), nV/rtHz		80	80	80	80	80
Vn at 1kHz(Typ)(nV/rtHz)	80
Vos (Offset Voltage @ 25C)(Max), mV		9	9	9	9	9
Vos (Offset Voltage @ 25C)(Max)(mV)	9

Öko-Plan

	LP324M	LP324M/NOPB	LP324MT/NOPB	LP324MTX/NOPB	LP324MX/NOPB	LP324N/NOPB
RoHS	TBD	Compliant	Compliant	Compliant	Compliant	Compliant
Pb Free	No

Anwendungshinweise

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AN-284 Single-Supply Applications of CMOS MICRODACs (Rev. B)
PDF, 271 Kb, Revision: B, Datei veröffentlicht: Apr 22, 2013
CMOS data acquisition and conversion products are becoming the ideal choice for microprocessorcontrolled analog systems. The use of CMOS allows the addition of more digital logic functionality on tothe same die as the analog circuitry to minimize external parts requirements. The inherently low powerconsumption is also a big factor for battery operation and low heat generation in large scale

Modellreihe

Serie: LP324-N (6)

LP324M LP324M/NOPB LP324MT/NOPB LP324MTX/NOPB LP324MX/NOPB LP324N/NOPB

Herstellerklassifikation

Semiconductors> Amplifiers> Operational Amplifiers (Op Amps)> Ultra-Low-Power Op Amps (<=250uA)