Datasheet Texas Instruments LMK61PD0A2-SIAR — Datenblatt
| Hersteller | Texas Instruments |
| Serie | LMK61PD0A2 |
| Artikelnummer | LMK61PD0A2-SIAR |
Ultra-Low Jitter Pin wählbar, Differentialoszillator, +/- 50ppm 8-QFM -40 bis 85
Datenblätter
LMK61PD0A2 Ultra-Low Jitter Pin Selectable Oscillator datasheet
PDF, 1.1 Mb, Revision: A, Datei veröffentlicht: Nov 3, 2015
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Preise
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 8 | 8 |
| Package Type | SIA | SIA |
| Industry STD Term | QFM | QFM |
| JEDEC Code | R-PSIP-N | R-PSIP-N |
| Package QTY | 2500 | 2500 |
| Carrier | LARGE T&R | LARGE T&R |
| Device Marking | PD0A2 | LMK61 |
| Width (mm) | 5 | 5 |
| Length (mm) | 7 | 7 |
| Thickness (mm) | .8 | .8 |
| Pitch (mm) | 1.85 | 1.85 |
| Max Height (mm) | 1.15 | 1.15 |
| Mechanical Data | Herunterladen | Herunterladen |
Parameter
| Additional Features | 7x5mm |
| Jitter | 0.1 ps |
| Operating Temperature Range | -40 to 85 C |
| Output Frequency(Max) | 312.5 MHz |
| Output Level | HCSL,LVDS,LVPECL |
| Pin/Package | 8QFM |
| Rating | Catalog |
| Special Features | Pin Selectable |
| Stability | 50 ppm |
| VCC Core | 3.3 V |
Öko-Plan
| RoHS | Compliant |
Design Kits und Evaluierungsmodule
- Evaluation Modules & Boards: LMK61PDEVM
LMK61PDEVM Ultra-Low-Jitter Pin Selectable Oscillator EVM
Lifecycle Status: Active (Recommended for new designs)
Modellreihe
Serie: LMK61PD0A2 (2)
- LMK61PD0A2-SIAR LMK61PD0A2-SIAT
Herstellerklassifikation
- Semiconductors > Clock and Timing > Clock Oscillators
Andere Namen:
LMK61PD0A2SIAR, LMK61PD0A2 SIAR