Datasheet Texas Instruments LMK04803 — Datenblatt

HerstellerTexas Instruments
SerieLMK04803
Datasheet Texas Instruments LMK04803

Rauscharmer Clock-Jitter-Reiniger mit zwei kaskadierten PLLs und integriertem 1,9-GHz-VCO

Datenblätter

LMK0480x Low-Noise Clock Jitter Cleaner with Dual Loop PLLs datasheet
PDF, 2.1 Mb, Revision: K, Datei veröffentlicht: Dec 24, 2014
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Preise

Status

LMK04803BISQ/NOPBLMK04803BISQE/NOPBLMK04803BISQX/NOPB
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYesNo

Verpackung

LMK04803BISQ/NOPBLMK04803BISQE/NOPBLMK04803BISQX/NOPB
N123
Pin646464
Package TypeNKDNKDNKD
Industry STD TermWQFNWQFNWQFN
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY10002502000
CarrierLARGE T&RSMALL T&RLARGE T&R
Device MarkingK04803BISQK04803BISQK04803BISQ
Width (mm)999
Length (mm)999
Pitch (mm).5.5.5
Max Height (mm).8.8.8
Mechanical DataHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsLMK04803BISQ/NOPB
LMK04803BISQ/NOPB
LMK04803BISQE/NOPB
LMK04803BISQE/NOPB
LMK04803BISQX/NOPB
LMK04803BISQX/NOPB
Number of Inputs222
Number of Outputs141414
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Output Frequency(Max), MHz203020302030
Output Frequency(Min), MHz0.220.220.22
Output LevelLVCMOS,LVDS,LVPECLLVCMOS,LVDS,LVPECLLVCMOS,LVDS,LVPECL
Package GroupWQFNWQFNWQFN
Package Size: mm2:W x L, PKG64WQFN: 81 mm2: 9 x 9(WQFN)64WQFN: 81 mm2: 9 x 9(WQFN)64WQFN: 81 mm2: 9 x 9(WQFN)
RMS Jitter0.1110.1110.111
RatingCatalogCatalogCatalog
Special FeaturesHoldover mode,Int. xtal oscillator,Manual/auto switch,SPI,uWireHoldover mode,Int. xtal oscillator,Manual/auto switch,SPI,uWireHoldover mode,Int. xtal oscillator,Manual/auto switch,SPI,uWire
Supply Voltage(Max), V3.453.453.45
Supply Voltage(Min), V3.153.153.15
VCO Frequency(Max), MHz203020302030
VCO Frequency(Min), MHz184018401840

Öko-Plan

LMK04803BISQ/NOPBLMK04803BISQE/NOPBLMK04803BISQX/NOPB
RoHSCompliantCompliantCompliant

Anwendungshinweise

  • Using the LMK0480x/LMK04906 for Hitless Switching and Holdover
    PDF, 3.8 Mb, Datei veröffentlicht: Jul 12, 2013
    This application report discusses some of the key performance results when using LMK0480x/LMK04906to implement hitless switching between reference clocks. Hitless Switching is required in certainapplications such as SONET/SDH/line port cards and routers/switchers in order to minimize thepropagation of phase transients to the clock outputs during reference clock switching. On loss of all vali

Modellreihe

Herstellerklassifikation

  • Semiconductors> Clock and Timing> Clock Jitter Cleaners> Dual / Cascaded PLL