Datasheet Texas Instruments DS92LV2412 — Datenblatt

HerstellerTexas Instruments
SerieDS92LV2412
Datasheet Texas Instruments DS92LV2412

24-Bit-Channel-Link-II-Deserializer mit 5-50 MHz

Datenblätter

DS92LV241x 5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer datasheet
PDF, 1.4 Mb, Revision: E, Datei veröffentlicht: Feb 9, 2015
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Preise

Status

DS92LV2412SQ/NOPBDS92LV2412SQE/NOPBDS92LV2412SQX/NOPB
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoNo

Verpackung

DS92LV2412SQ/NOPBDS92LV2412SQE/NOPBDS92LV2412SQX/NOPB
N123
Pin606060
Package TypeNKBNKBNKB
Industry STD TermWQFNWQFNWQFN
JEDEC CodeS-PQSO-NS-PQSO-NS-PQSO-N
Package QTY10002502000
CarrierLARGE T&RSMALL T&RLARGE T&R
Device MarkingLV2412SQLV2412SQLV2412SQ
Width (mm)999
Length (mm)999
Thickness (mm).8.8.8
Pitch (mm).5.5.5
Max Height (mm).8.8.8
Mechanical DataHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsDS92LV2412SQ/NOPB
DS92LV2412SQ/NOPB
DS92LV2412SQE/NOPB
DS92LV2412SQE/NOPB
DS92LV2412SQX/NOPB
DS92LV2412SQX/NOPB
Clock Max, MHz505050
Clock Min, MHz555
Compression Ratio24 to 124 to 124 to 1
ESD, kV888
FunctionDeserializerDeserializerDeserializer
Input CompatibilityCMLCMLCML
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Output CompatibilityLVCMOSLVCMOSLVCMOS
Package GroupWQFNWQFNWQFN
Package Size: mm2:W x L, PKG60WQFN: 81 mm2: 9 x 9(WQFN)60WQFN: 81 mm2: 9 x 9(WQFN)60WQFN: 81 mm2: 9 x 9(WQFN)
Parallel Bus Width, bits242424
ProtocolsChannel-Link IIChannel-Link IIChannel-Link II
RatingCatalogCatalogCatalog

Öko-Plan

DS92LV2412SQ/NOPBDS92LV2412SQE/NOPBDS92LV2412SQX/NOPB
RoHSCompliantCompliantCompliant

Anwendungshinweise

  • DS15BA101 & DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES (Rev. E)
    PDF, 170 Kb, Revision: E, Datei veröffentlicht: Apr 29, 2013
    Reduction in system size, increase in system performance and savings in system cost are valuablebenefits that SER/DES devices (Serializers and Deserializers) bring to many system designers. Thesebenefits are the reason why SER/DES are integral pieces of many of today’s high-speed systems.One of the design constraints for these systems is the maximum transmission distance between a serializer

Modellreihe

Herstellerklassifikation

  • Semiconductors> Interface> Serializer, Deserializer> Channel Link II