Datasheet Texas Instruments DAC5681 — Datenblatt

HerstellerTexas Instruments
SerieDAC5681
Datasheet Texas Instruments DAC5681

16-Bit-Digital-Analog-Wandler (DAC) mit 1,0 GSPS

Datenblätter

16-bit 1.0 GSPS Digital-To-Analog Converter (DAC) . datasheet
PDF, 2.1 Mb, Revision: C, Datei veröffentlicht: Aug 6, 2012
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Preise

Status

DAC5681IRGCRDAC5681IRGCT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNo

Verpackung

DAC5681IRGCRDAC5681IRGCT
N12
Pin6464
Package TypeRGCRGC
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY2000250
CarrierLARGE T&RSMALL T&R
Device MarkingDAC5681IDAC5681I
Width (mm)99
Length (mm)99
Thickness (mm).88.88
Pitch (mm).5.5
Max Height (mm)11
Mechanical DataHerunterladenHerunterladen

Parameter

Parameters / ModelsDAC5681IRGCR
DAC5681IRGCR
DAC5681IRGCT
DAC5681IRGCT
ArchitectureCurrent SinkCurrent Sink
DAC Channels11
InterfaceParallel LVDSParallel LVDS
Interpolation1x1x
Operating Temperature Range, C-40 to 85-40 to 85
Package GroupVQFNVQFN
Package Size: mm2:W x L, PKG64VQFN: 81 mm2: 9 x 9(VQFN)64VQFN: 81 mm2: 9 x 9(VQFN)
Power Consumption(Typ), mW650650
RatingCatalogCatalog
Resolution, Bits1616
SFDR, dB8181
Sample / Update Rate, MSPS10001000

Öko-Plan

DAC5681IRGCRDAC5681IRGCT
RoHSCompliantCompliant

Anwendungshinweise

  • Interfacing op amps to high-speed DACs, Part 1: Current-sinking DACs
    PDF, 319 Kb, Datei veröffentlicht: Jul 14, 2009
  • Passive Terminations for Current Output DACs
    PDF, 244 Kb, Datei veröffentlicht: Nov 10, 2008
    The correct implementation of the high-speed DAC output termination is critical to achieving the best possible performance. The typical application involves choosing the correct network to create the necessary dc bias levels and correct effective impedance load to keep the output voltage within the compliance levels. This ensures that the maximum output signal amplitude and optimum ac performance
  • Q3 2009 Issue Analog Applications Journal
    PDF, 2.1 Mb, Datei veröffentlicht: Jul 14, 2009
  • High Speed Digital-to-Analog Converters Basics (Rev. A)
    PDF, 829 Kb, Revision: A, Datei veröffentlicht: Oct 23, 2012
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Datei veröffentlicht: Jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Datei veröffentlicht: Jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers

Modellreihe

Serie: DAC5681 (2)

Herstellerklassifikation

  • Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> High Speed DACs (>10MSPS)