Datasheet Texas Instruments CDCLVP1208RHDR — Datenblatt

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SCAS890E – OCTOBER 2009 – REVISED NOVEMBER 2015 CDCLVP1208 Eight LVPECL Output, High-Performance Clock 2:8 Buffer
1 Features 3 Description The CDCLVP1208 is a highly versatile, low additive
jitter buffer that can generate eight copies of LVPECL
clock outputs from one of two selectable LVPECL,
LVDS, or LVCMOS inputs for a variety of
communication applications. It has a maximum clock
frequency up to 2 GHz. The CDCLVP1208 features
an on-chip multiplexer (MUX) for selecting one of two
inputs that can be easily configured solely through a
control terminal. The overall additive jitter
performance is less than 0.1 ps, RMS from 10 kHz to
20 MHz, and overall output skew is as low as 20 ps,
making the device a perfect choice for use in
demanding applications. 1 2:8 Differential Buffer
Selectable Clock Inputs Through Control terminal
Universal Inputs Accept LVPECL, LVDS, and
LVCMOS/LVTTL …