Datasheet Texas Instruments CDCE18005RGZR — Datenblatt

CDCE18005
www.ti.com SCAS863B – NOVEMBER 2008 – REVISED NOVEMBER 2012 Five/Ten Output Clock Programmable Buffer
Check for Samples: CDCE18005 FEATURES APPLICATIONS 1 Universal Input Buffers That Accept LVPECL,
LVDS, or LVCMOS Level Signaling
Fully Configurable Outputs Including
Frequency, Output Format, and Output Skew
Output Multiplexer That Serves as a Clock
Switch Between the Three Reference Inputs
and the Outputs
Clock Generation Via AT-Cut Crystal
Integrated EEPROM Determines Device
Configuration at Power-up
Low Additive Jitter Performance
Universal Output Blocks Support up to 5
Differential, 10 Single-ended, or Combinations
of Differential or Single-ended:
– Low Additive Jitter
– Output Frequency up to 1.5 GHz
– LVPECL, LVDS, LVCMOS, and Special High
Output Swing Modes
– Independent Output Dividers Support
Divide Ratios from 1–80
– Independent limited Coarse Skew Control …