Datasheet Texas Instruments CD74HCT75M — Datenblatt
| Hersteller | Texas Instruments |
| Serie | CD74HCT75 |
| Artikelnummer | CD74HCT75M |
Hochgeschwindigkeits-CMOS-Logik Dual 2-Bit Bistabil Transparent Latch 16-SOIC -55 bis 125
Datenblätter
CD54HC75, CD74HC75, CD54HCT75, CD74HCT75 datasheet
PDF, 694 Kb, Revision: F, Datei veröffentlicht: Oct 13, 2003
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Preise
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 16 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 40 |
| Carrier | TUBE |
| Device Marking | HCT75M |
| Width (mm) | 3.91 |
| Length (mm) | 9.9 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | Herunterladen |
Parameter
| 3-State Output | No |
| Bits | 4 |
| F @ Nom Voltage(Max) | 25 Mhz |
| ICC @ Nom Voltage(Max) | 0.04 mA |
| Operating Temperature Range | -55 to 125 C |
| Output Drive (IOL/IOH)(Max) | 4/-4 mA |
| Package Group | SOIC |
| Package Size: mm2:W x L | 16SOIC: 59 mm2: 6 x 9.9(SOIC) PKG |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | HCT |
| VCC(Max) | 5.5 V |
| VCC(Min) | 4.5 V |
| Voltage(Nom) | 5 V |
| tpd @ Nom Voltage(Max) | 35 ns |
Öko-Plan
| RoHS | Compliant |
Anwendungshinweise
- Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revision: A, Datei veröffentlicht: Feb 6, 2015
Modellreihe
Serie: CD74HCT75 (4)
- CD74HCT75E CD74HCT75EE4 CD74HCT75M CD74HCT75MG4
Herstellerklassifikation
- Semiconductors > Logic > Flip-Flop/Latch/Register > Other Latch