Datasheet Texas Instruments CD74HCT107 — Datenblatt
| Hersteller | Texas Instruments | 
| Serie | CD74HCT107 | 

Hochgeschwindigkeits-CMOS-Logik-Dual-Negative-Edge-Triggered JK-Flip-Flops mit Reset
Datenblätter
CD54HC107, CD74HC107, CD54HCT107, CD74HCT107 datasheet
PDF, 722 Kb, Revision: D, Datei veröffentlicht: Oct 21, 2003
Auszug aus dem Dokument
Status
| CD74HCT107E | CD74HCT107EE4 | |
|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | 
| Manufacture's Sample Availability | No | No | 
Verpackung
| CD74HCT107E | CD74HCT107EE4 | |
|---|---|---|
| N | 1 | 2 | 
| Pin | 14 | 14 | 
| Package Type | N | N | 
| Industry STD Term | PDIP | PDIP | 
| JEDEC Code | R-PDIP-T | R-PDIP-T | 
| Package QTY | 25 | 25 | 
| Carrier | TUBE | TUBE | 
| Device Marking | CD74HCT107E | CD74HCT107E | 
| Width (mm) | 6.35 | 6.35 | 
| Length (mm) | 19.3 | 19.3 | 
| Thickness (mm) | 3.9 | 3.9 | 
| Pitch (mm) | 2.54 | 2.54 | 
| Max Height (mm) | 5.08 | 5.08 | 
| Mechanical Data | Herunterladen | Herunterladen | 
Parameter
| Parameters / Models | CD74HCT107E![]()  | CD74HCT107EE4![]()  | 
|---|---|---|
| Bits | 2 | 2 | 
| F @ Nom Voltage(Max), Mhz | 25 | 25 | 
| ICC @ Nom Voltage(Max), mA | 0.04 | 0.04 | 
| Output Drive (IOL/IOH)(Max), mA | -6/6 | -6/6 | 
| Package Group | PDIP | PDIP | 
| Package Size: mm2:W x L, PKG | See datasheet (PDIP) | See datasheet (PDIP) | 
| Rating | Catalog | Catalog | 
| Schmitt Trigger | No | No | 
| Technology Family | HCT | HCT | 
| VCC(Max), V | 5.5 | 5.5 | 
| VCC(Min), V | 4.5 | 4.5 | 
| Voltage(Nom), V | 5 | 5 | 
| tpd @ Nom Voltage(Max), ns | 43 | 43 | 
Öko-Plan
| CD74HCT107E | CD74HCT107EE4 | |
|---|---|---|
| RoHS | Compliant | Compliant | 
| Pb Free | Yes | Yes | 
Anwendungshinweise
- Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revision: A, Datei veröffentlicht: Feb 6, 2015
 
Modellreihe
Serie: CD74HCT107 (2)
Herstellerklassifikation
- Semiconductors> Logic> Flip-Flop/Latch/Register> J-K Flip-Flop