Datasheet Texas Instruments CD74AC74 — Datenblatt

HerstellerTexas Instruments
SerieCD74AC74
Datasheet Texas Instruments CD74AC74

Dual Positive-Edge-Triggered D-Type Flip-Flops mit Set und Reset

Datenblätter

CD54AC74, CD74AC74 datasheet
PDF, 786 Kb, Revision: D, Datei veröffentlicht: Dec 5, 2002
Auszug aus dem Dokument

Preise

Status

CD74AC74ECD74AC74EE4CD74AC74MCD74AC74M96CD74AC74M96E4CD74AC74M96G4CD74AC74ME4CD74AC74MG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNo

Verpackung

CD74AC74ECD74AC74EE4CD74AC74MCD74AC74M96CD74AC74M96E4CD74AC74M96G4CD74AC74ME4CD74AC74MG4
N12345678
Pin1414141414141414
Package TypeNNDDDDDD
Industry STD TermPDIPPDIPSOICSOICSOICSOICSOICSOIC
JEDEC CodeR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY2525502500250025005050
CarrierTUBETUBETUBELARGE T&RLARGE T&RLARGE T&RTUBETUBE
Device MarkingCD74AC74ECD74AC74EAC74MAC74MAC74MAC74MAC74MAC74M
Width (mm)6.356.353.913.913.913.913.913.91
Length (mm)19.319.38.658.658.658.658.658.65
Thickness (mm)3.93.91.581.581.581.581.581.58
Pitch (mm)2.542.541.271.271.271.271.271.27
Max Height (mm)5.085.081.751.751.751.751.751.75
Mechanical DataHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsCD74AC74E
CD74AC74E
CD74AC74EE4
CD74AC74EE4
CD74AC74M
CD74AC74M
CD74AC74M96
CD74AC74M96
CD74AC74M96E4
CD74AC74M96E4
CD74AC74M96G4
CD74AC74M96G4
CD74AC74ME4
CD74AC74ME4
CD74AC74MG4
CD74AC74MG4
3-State OutputNoNoNoNoNoNoNoNo
Bits22222222
F @ Nom Voltage(Max), Mhz100100100100100100100100
ICC @ Nom Voltage(Max), mA0.040.040.040.040.040.040.040.04
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-2424/-2424/-2424/-2424/-2424/-24
Package GroupPDIPPDIPSOICSOICSOICSOICSOICSOIC
Package Size: mm2:W x L, PKGSee datasheet (PDIP)See datasheet (PDIP)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNo
Technology FamilyACACACACACACACAC
VCC(Max), V5.55.55.55.55.55.55.55.5
VCC(Min), V1.51.51.51.51.51.51.51.5
Voltage(Nom), V1.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,5
tpd @ Nom Voltage(Max), ns114,12.7,9.1114,12.7,9.1114,12.7,9.1114,12.7,9.1114,12.7,9.1114,12.7,9.1114,12.7,9.1114,12.7,9.1

Öko-Plan

CD74AC74ECD74AC74EE4CD74AC74MCD74AC74M96CD74AC74M96E4CD74AC74M96G4CD74AC74ME4CD74AC74MG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant
Pb FreeYesYes

Anwendungshinweise

  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revision: A, Datei veröffentlicht: Feb 6, 2015
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, Datei veröffentlicht: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Modellreihe

Herstellerklassifikation

  • Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop