Datasheet Texas Instruments CD4042B — Datenblatt

HerstellerTexas Instruments
SerieCD4042B
Datasheet Texas Instruments CD4042B

CMOS Quad Clocked 'D' Latch

Datenblätter

CD4042B TYPES datasheet
PDF, 1.9 Mb, Revision: D, Datei veröffentlicht: Oct 14, 2003
Auszug aus dem Dokument

Preise

Status

CD4042BDCD4042BDE4CD4042BDRCD4042BDRG4CD4042BDTCD4042BDWCD4042BDWE4CD4042BECD4042BEE4CD4042BNSRCD4042BPWCD4042BPWE4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNoNoNoNoNo

Verpackung

CD4042BDCD4042BDE4CD4042BDRCD4042BDRG4CD4042BDTCD4042BDWCD4042BDWE4CD4042BECD4042BEE4CD4042BNSRCD4042BPWCD4042BPWE4
N123456789101112
Pin161616161616161616161616
Package TypeDDDDDDWDWNNNSPWPW
Industry STD TermSOICSOICSOICSOICSOICSOICSOICPDIPPDIPSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY4040250025002504040252520009090
CarrierTUBETUBELARGE T&RLARGE T&RSMALL T&RTUBETUBETUBETUBELARGE T&RTUBETUBE
Device MarkingCD4042BMCD4042BMCD4042BMCD4042BMCD4042BMCD4042BMCD4042BMCD4042BECD4042BECD4042BCM042BCM042B
Width (mm)3.913.913.913.913.917.57.56.356.355.34.44.4
Length (mm)9.99.99.99.99.910.310.319.319.310.355
Thickness (mm)1.581.581.581.581.582.352.353.93.91.9511
Pitch (mm)1.271.271.271.271.271.271.272.542.541.27.65.65
Max Height (mm)1.751.751.751.751.752.652.655.085.0821.21.2
Mechanical DataHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsCD4042BD
CD4042BD
CD4042BDE4
CD4042BDE4
CD4042BDR
CD4042BDR
CD4042BDRG4
CD4042BDRG4
CD4042BDT
CD4042BDT
CD4042BDW
CD4042BDW
CD4042BDWE4
CD4042BDWE4
CD4042BE
CD4042BE
CD4042BEE4
CD4042BEE4
CD4042BNSR
CD4042BNSR
CD4042BPW
CD4042BPW
CD4042BPWE4
CD4042BPWE4
3-State OutputNoNoNoNoNoNoNoNoNoNoNoNo
Bits444444444444
F @ Nom Voltage(Max), Mhz888888888888
ICC @ Nom Voltage(Max), mA0.060.060.060.060.060.060.060.060.060.060.060.06
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA1.5/-1.51.5/-1.51.5/-1.51.5/-1.51.5/-1.51.5/-1.51.5/-1.51.5/-1.51.5/-1.51.5/-1.51.5/-1.51.5/-1.5
Package GroupSOICSOICSOICSOICSOICSOICSOICPDIPPDIPSOTSSOPTSSOP
Package Size: mm2:W x L, PKG16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)See datasheet (PDIP)See datasheet (PDIP)16SO: 80 mm2: 7.8 x 10.2(SO)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNoNoNoNo
Technology FamilyCD4000CD4000CD4000CD4000CD4000CD4000CD4000CD4000CD4000CD4000CD4000CD4000
VCC(Max), V181818181818181818181818
VCC(Min), V333333333333
Voltage(Nom), V101010101010101010101010
tpd @ Nom Voltage(Max), ns200200200200200200200200200200200200

Öko-Plan

CD4042BDCD4042BDE4CD4042BDRCD4042BDRG4CD4042BDTCD4042BDWCD4042BDWE4CD4042BECD4042BEE4CD4042BNSRCD4042BPWCD4042BPWE4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant
Pb FreeYesYes

Anwendungshinweise

  • Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics
    PDF, 188 Kb, Datei veröffentlicht: Dec 3, 2001
    Both buffered and unbuffered CMOS B-series gates inverters and high-current IC products are available from TI. Each product classification has application advantages in appropriate logic-system designs. Many CMOS suppliers have concentrated on promoting buffered B-series products with applications literature focusing on the attributes and use of the buffered types. This practice has left an imb
  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revision: A, Datei veröffentlicht: Feb 6, 2015

Modellreihe

Herstellerklassifikation

  • Semiconductors> Logic> Flip-Flop/Latch/Register> Other Latch