Datasheet Texas Instruments ADS5485 — Datenblatt

HerstellerTexas Instruments
SerieADS5485
Datasheet Texas Instruments ADS5485

16-Bit-Analog-Digital-Wandler mit 200 MSPS (ADC)

Datenblätter

16-Bit, 170/200-MSPS Analog-to-Digital Converters datasheet
PDF, 2.4 Mb, Revision: C, Datei veröffentlicht: Oct 8, 2009
Auszug aus dem Dokument
16-Bit, 170/200-MSPS Analog-to-Digital Converters (Rev. C)
PDF, 2.4 Mb, Revision: C, Datei veröffentlicht: Oct 8, 2009

Preise

Status

ADS5485IRGC25ADS5485IRGCRADS5485IRGCTADS5485IRGCTG4
Lifecycle StatusNRND (Not recommended for new designs)NRND (Not recommended for new designs)NRND (Not recommended for new designs)NRND (Not recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNo

Verpackung

ADS5485IRGC25ADS5485IRGCRADS5485IRGCTADS5485IRGCTG4
N1234
Pin64646464
Package TypeRGCRGCRGCRGC
Industry STD TermVQFNVQFNVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-NS-PQFP-N
Device MarkingAZ5485AZ5485AZ5485AZ5485
Width (mm)9999
Length (mm)9999
Thickness (mm).88.88.88.88
Pitch (mm).5.5.5.5
Max Height (mm)1111
Mechanical DataHerunterladenHerunterladenHerunterladenHerunterladen
Package QTY2000250250
CarrierLARGE T&RSMALL T&RSMALL T&R

Öko-Plan

ADS5485IRGC25ADS5485IRGCRADS5485IRGCTADS5485IRGCTG4
RoHSNot CompliantCompliantCompliantCompliant
Pb FreeNoYes

Anwendungshinweise

  • Input Impedance Measurement Using ADC FFT Data
    PDF, 275 Kb, Datei veröffentlicht: Jan 11, 2011
    Texas Instruments has introduced a family of high-speed analog-to-digital converters (ADCs) suited tomeet the demand for high-speed and high-IF sampling systems. To achieve the highest overall system performance, an analog front-end circuit with an antialiasing filter must drive the ADC with the highestpossible dynamic range and lowest distortions. One important parameter of the front-end circ
  • High-Speed Analog-to-Digital Converter Basics
    PDF, 1.1 Mb, Datei veröffentlicht: Jan 11, 2012
    The goal of this document is to introduce a wide range of theories and topics that are relevant tohigh-speed analog-to-digital converters (ADC). This document provides details on sampling theorydata-sheet specifications ADC selection criteria and evaluation methods clock jitter and other commonsystem-level concerns. In addition some end-users will want to extend the performance capabil
  • QFN Layout Guidelines
    PDF, 1.3 Mb, Datei veröffentlicht: Jul 28, 2006
    Board layout and stencil information for most Texas Instruments Quad Flat No-Lead (QFN) devices is provided in their data sheets. This document helps printed-circuit board designers understand and better use this information for optimal designs.
  • Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)
    PDF, 2.0 Mb, Revision: A, Datei veröffentlicht: May 22, 2015
  • Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)
    PDF, 1.2 Mb, Revision: A, Datei veröffentlicht: Jul 19, 2013
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, Datei veröffentlicht: Apr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Kb, Revision: A, Datei veröffentlicht: Sep 10, 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Datei veröffentlicht: Jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Datei veröffentlicht: Jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, Datei veröffentlicht: Apr 16, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, Datei veröffentlicht: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, Datei veröffentlicht: May 18, 2015
  • Interleaving Analog-to-Digital Converters
    PDF, 64 Kb, Datei veröffentlicht: Oct 2, 2000
    It is tempting when pushing the limits of analog-to-digital conversion to consider interleaving two or more converters to increase the sample rate. However, such designs must take into consideration several possible sources of error.
  • What Designers Should Know About Data Converter Drift
    PDF, 95 Kb, Datei veröffentlicht: Oct 2, 2000
    Exactly how inaccurate will a change in temperature make an analog-to-digital or digital-to-analog converter? As designers are well aware, a 12-bit device may provide a much lower accuracy at its operating-temperature extremes, perhaps only to 9 or even 8 bits. But for lack of more precise knowledge, many play it safe (and expensive) and overspecify.
  • Input Impedance Measurement Using ADC FFT Data
    PDF, 275 Kb, Datei veröffentlicht: Jan 11, 2011
    ADS5493, ADS5400, ADS5481, ADS5482, ADS5483, ADS5484, ADS5485 Input Impedance Measurement Using ADC FFT Data
  • High-Speed, Analog-to-Digital Converter Basics
    PDF, 1.1 Mb, Datei veröffentlicht: Jan 11, 2012
    The goal of this document is to introduce a wide range of theories and topics that are relevant to high-speed, analog-to-digital converters (ADC). This document provides details on sampling theory,
  • QFN Layout Guidelines
    PDF, 1.3 Mb, Datei veröffentlicht: Jul 28, 2006
    Board layout and stencil information for most Texas Instruments Quad Flat No-Lead (QFN) devices is provided in their data sheets. This document helps printed-circuit board designers understand and bet
  • Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)
    PDF, 2.0 Mb, Revision: A, Datei veröffentlicht: May 22, 2015
    ADS6129, ADS6149 Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat
  • Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)
    PDF, 1.2 Mb, Revision: A, Datei veröffentlicht: Jul 19, 2013
    ADS4149 Why Use Oversampling when Undersampling Can Do the Job?
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, Datei veröffentlicht: Apr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Kb, Revision: A, Datei veröffentlicht: Sep 10, 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Datei veröffentlicht: Jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the refe
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Datei veröffentlicht: Jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed, high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483, which is capable of
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, Datei veröffentlicht: Apr 16, 2015
    AB-082 Principles of Data Acquisition and Conversion
  • Interleaving Analog-to-Digital Converters
    PDF, 64 Kb, Datei veröffentlicht: Oct 2, 2000
    It is tempting when pushing the limits of analog-to-digital conversion to consider interleaving two or more converters to increase the sample rate. However, such designs must take into consideration s
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, Datei veröffentlicht: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (ΔΣ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specificati
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, Datei veröffentlicht: May 18, 2015
    AB-084 Analog-to-Digital Grounding Practices Affect System Performance
  • What Designers Should Know About Data Converter Drift
    PDF, 95 Kb, Datei veröffentlicht: Oct 2, 2000
    Exactly how inaccurate will a change in temperature make an analog-to-digital or digital-to-analog converter? As designers are well aware, a 12-bit device may provide a much lower accuracy at its oper

Modellreihe

Herstellerklassifikation

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)