Datasheet Texas Instruments ADS5400 — Datenblatt

HerstellerTexas Instruments
SerieADS5400
Datasheet Texas Instruments ADS5400

12-Bit-1,0-GSPS-Analog-Digital-Wandler (ADC)

Datenblätter

ADS5400 12-Bit, 1-GSPS Analog-to-Digital Converter datasheet
PDF, 2.3 Mb, Revision: C, Datei veröffentlicht: Jan 15, 2016
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Preise

Status

ADS5400IPZPADS5400IPZPR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNo

Verpackung

ADS5400IPZPADS5400IPZPR
N12
Pin100100
Package TypePZPPZP
Industry STD TermHTQFPHTQFP
JEDEC CodeS-PQFP-GS-PQFP-G
Package QTY901000
CarrierJEDEC TRAY (10+1)LARGE T&R
Device MarkingADS5400IADS5400I
Width (mm)1414
Length (mm)1414
Thickness (mm)11
Pitch (mm).5.5
Max Height (mm)1.21.2
Mechanical DataHerunterladenHerunterladen

Parameter

Parameters / ModelsADS5400IPZP
ADS5400IPZP
ADS5400IPZPR
ADS5400IPZPR
# Input Channels11
Analog Input BW, MHz21502150
ArchitecturePipelinePipeline
DNL(Max), +/-LSB22
DNL(Typ), +/-LSB0.70.7
ENOB, Bits9.39.3
INL(Max), +/-LSB4.54.5
INL(Typ), +/-LSB22
Input BufferYesYes
Input Range, Vp-p22
InterfaceParallel LVDSParallel LVDS
Operating Temperature Range, C-40 to 85-40 to 85
Package GroupHTQFPHTQFP
Package Size: mm2:W x L, PKG100HTQFP: 256 mm2: 16 x 16(HTQFP)100HTQFP: 256 mm2: 16 x 16(HTQFP)
Power Consumption(Typ), mW22002200
RatingCatalogCatalog
Reference ModeExt,IntExt,Int
Resolution, Bits1212
SFDR, dB7575
SINAD, dB5858
SNR, dB59.159.1
Sample Rate(Max), MSPS10001000

Öko-Plan

ADS5400IPZPADS5400IPZPR
RoHSCompliantCompliant

Anwendungshinweise

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    Texas Instruments has introduced a family of high-speed analog-to-digital converters (ADCs) suited tomeet the demand for high-speed and high-IF sampling systems. To achieve the highest overall system performance, an analog front-end circuit with an antialiasing filter must drive the ADC with the highestpossible dynamic range and lowest distortions. One important parameter of the front-end circ
  • High-Speed Analog-to-Digital Converter Basics
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    The goal of this document is to introduce a wide range of theories and topics that are relevant tohigh-speed analog-to-digital converters (ADC). This document provides details on sampling theorydata-sheet specifications ADC selection criteria and evaluation methods clock jitter and other commonsystem-level concerns. In addition some end-users will want to extend the performance capabil
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    PDF, 805 Kb, Datei veröffentlicht: Sep 4, 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
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    PDF, 1.2 Mb, Revision: A, Datei veröffentlicht: Jul 19, 2013
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, Datei veröffentlicht: Apr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Kb, Revision: A, Datei veröffentlicht: Sep 10, 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Datei veröffentlicht: Jun 2, 2008
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  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Datei veröffentlicht: Jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, Datei veröffentlicht: Apr 16, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, Datei veröffentlicht: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
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    PDF, 69 Kb, Revision: A, Datei veröffentlicht: May 18, 2015

Modellreihe

Serie: ADS5400 (2)

Herstellerklassifikation

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)