Datasheet Texas Instruments 66AK2H06 — Datenblatt

HerstellerTexas Instruments
Serie66AK2H06
Datasheet Texas Instruments 66AK2H06

Multicore DSP + ARM KeyStone II System-on-Chip (SoC)

Datenblätter

66AK2Hxx Multicore DSP+ARMВ® KeyStone II System-on-Chip (SoC) datasheet
PDF, 2.4 Mb, Revision: F, Datei veröffentlicht: Jun 2, 2017
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Preise

Status

66AK2H06BAAW266AK2H06BAAW2466AK2H06BAAWA266AK2H06BAAWA2466AK2H06BXAAW266AK2H06DAAW266AK2H06DAAW2466AK2H06DAAWA266AK2H06DAAWA24
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoYesNoNoNoNoNo

Verpackung

66AK2H06BAAW266AK2H06BAAW2466AK2H06BAAWA266AK2H06BAAWA2466AK2H06BXAAW266AK2H06DAAW266AK2H06DAAW2466AK2H06DAAWA266AK2H06DAAWA24
N123456789
Pin151715171517151715171517151715171517
Package TypeAAWAAWAAWAAWAAWAAWAAWAAWAAW
Package QTY21121212121212121
CarrierJEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)
Device Marking@2012 TI66AK2H06AAW@2012 TI@2012 TI@2012 TI@2012 TI66AK2H06AAW@2012 TIA1.2GHZ/1.4GHZ
Width (mm)404040404040404040
Length (mm)404040404040404040
Thickness (mm)3.073.073.073.073.073.073.073.073.07
Mechanical DataHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladen

Parameter

Parameters / Models66AK2H06BAAW2
66AK2H06BAAW2
66AK2H06BAAW24
66AK2H06BAAW24
66AK2H06BAAWA2
66AK2H06BAAWA2
66AK2H06BAAWA24
66AK2H06BAAWA24
66AK2H06BXAAW2
66AK2H06BXAAW2
66AK2H06DAAW2
66AK2H06DAAW2
66AK2H06DAAW24
66AK2H06DAAW24
66AK2H06DAAWA2
66AK2H06DAAWA2
66AK2H06DAAWA24
66AK2H06DAAWA24
ARM CPU2 ARM Cortex-A152 ARM Cortex-A152 ARM Cortex-A152 ARM Cortex-A152 ARM Cortex-A152 ARM Cortex-A152 ARM Cortex-A152 ARM Cortex-A152 ARM Cortex-A15
ARM MHz, Max.1200,14001200,14001200,14001200,14001200,14001200,14001200,14001200,14001200,1400
ApplicationsAutomation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,SpaceAutomation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,SpaceAutomation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,SpaceAutomation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,SpaceAutomation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,SpaceAutomation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,SpaceAutomation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,SpaceAutomation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,SpaceAutomation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,Space
DRAMDDR3,DDR3LDDR3,DDR3LDDR3,DDR3LDDR3,DDR3LDDR3,DDR3LDDR3,DDR3LDDR3,DDR3LDDR3,DDR3LDDR3,DDR3L
DSP4 C66x4 C66x4 C66x4 C66x4 C66x4 C66x4 C66x4 C66x4 C66x
DSP MHz, Max.120012001200120012001200120012001200
EMAC4-port 1Gb Switch4-port 1Gb Switch4-port 1Gb Switch4-port 1Gb Switch4-port 1Gb Switch4-port 1Gb Switch4-port 1Gb Switch4-port 1Gb Switch4-port 1Gb Switch
Hardware AcceleratorsPacket Accelerator,Security AcceleratorPacket Accelerator,Security AcceleratorPacket Accelerator,Security AcceleratorPacket Accelerator,Security AcceleratorPacket Accelerator,Security AcceleratorPacket Accelerator,Security AcceleratorPacket Accelerator,Security AcceleratorPacket Accelerator,Security AcceleratorPacket Accelerator,Security Accelerator
I2C333333333
On-Chip L2 Cache4096 KB (ARM Cluster),1024 KB (per C66x DSP core)4096 KB (ARM Cluster),1024 KB (per C66x DSP core)4096 KB (ARM Cluster),1024 KB (per C66x DSP core)4096 KB (ARM Cluster),1024 KB (per C66x DSP core)4096 KB (ARM Cluster),1024 KB (per C66x DSP core)4096 KB (ARM Cluster),1024 KB (per C66x DSP core)4096 KB (ARM Cluster),1024 KB (per C66x DSP core)4096 KB (ARM Cluster),1024 KB (per C66x DSP core)4096 KB (ARM Cluster),1024 KB (per C66x DSP core)
Operating SystemsIntegrity,Linux,SYS/BIOS,VxWorksIntegrity,Linux,SYS/BIOS,VxWorksIntegrity,Linux,SYS/BIOS,VxWorksIntegrity,Linux,SYS/BIOS,VxWorksIntegrity,Linux,SYS/BIOS,VxWorksIntegrity,Linux,SYS/BIOS,VxWorksIntegrity,Linux,SYS/BIOS,VxWorksIntegrity,Linux,SYS/BIOS,VxWorksIntegrity,Linux,SYS/BIOS,VxWorks
Operating Temperature Range, C-40 to 100,0 to 85-40 to 100,0 to 85-40 to 100,0 to 85-40 to 100,0 to 85-40 to 100,0 to 85-40 to 100,0 to 85-40 to 100,0 to 85-40 to 100,0 to 85-40 to 100,0 to 85
Other On-Chip Memory6144 KB6144 KB6144 KB6144 KB6144 KB6144 KB6144 KB6144 KB6144 KB
PCI/PCIe2 PCIe Gen22 PCIe Gen22 PCIe Gen22 PCIe Gen22 PCIe Gen22 PCIe Gen22 PCIe Gen22 PCIe Gen22 PCIe Gen2
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
SPI333333333
UART, SCI222222222
USB111111111

Öko-Plan

66AK2H06BAAW266AK2H06BAAW2466AK2H06BAAWA266AK2H06BAAWA2466AK2H06BXAAW266AK2H06DAAW266AK2H06DAAW2466AK2H06DAAWA266AK2H06DAAWA24
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

Anwendungshinweise

  • Power Consumption Summary for 66AK2Hx System-on-Chip (SoC) Device Family
    PDF, 47 Kb, Datei veröffentlicht: Sep 28, 2017
    This application report discusses estimating the power consumption of Texas Instruments' K2Hx Digital Signal Processors (DSP) using a provided device-specific power spreadsheet. Note that the power model is applicable for all silicon revisions.
  • Throughput Performance Guide for KeyStone II Devices (Rev. B)
    PDF, 866 Kb, Revision: B, Datei veröffentlicht: Dec 22, 2015
    This application report analyzes various performance measurements of the KeyStone II family of processors. It provides a throughput analysis of the various support peripherals to different end-points and memory access.
  • Keystone II DDR3 Debug Guide
    PDF, 143 Kb, Datei veröffentlicht: Oct 16, 2015
    This guide provides tools for use when debugging a failing DDR3 interface on a KeyStone II device.
  • Power Management of KS2 Device (Rev. C)
    PDF, 61 Kb, Revision: C, Datei veröffentlicht: Jul 15, 2016
    This application report lists the steps to enable Class 0 Temperature Compensation (Class 0 TC) mode of SmartReflexв„ў Subsystem (SRSS) module available on such devices.
  • Keystone II DDR3 Initialization
    PDF, 73 Kb, Datei veröffentlicht: Jan 26, 2015
    This application report provides a step-to-step initialization guide for the Keystone II device DDR3 SDRAM controller.
  • Hardware Design Guide for KeyStone II Devices
    PDF, 1.8 Mb, Datei veröffentlicht: Mar 24, 2014
  • SERDES Link Commissioning on KeyStone I and II Devices
    PDF, 138 Kb, Datei veröffentlicht: Apr 13, 2016
    The serializer-deserializer (SerDes) performs serial-to-parallel conversions on data received from a peripheral device and parallel-to-serial conversion on data received from the CPU. This application report explains the SerDes transmit and receive parameters tuning, tools and some debug techniques for TI Keystone I and Keystone II devices.
  • PCIe Use Cases for KeyStone Devices
    PDF, 320 Kb, Datei veröffentlicht: Dec 13, 2011
  • Optimizing Loops on the C66x DSP
    PDF, 585 Kb, Datei veröffentlicht: Nov 9, 2010
  • Clocking Design Guide for KeyStone Devices
    PDF, 1.5 Mb, Datei veröffentlicht: Nov 9, 2010
  • The C6000 Embedded Application Binary Interface Migration Guide (Rev. A)
    PDF, 20 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
    The C6000 compiler tools support a new ELF-based ABI named EABI. Prior to this time, the compiler only supported a single ABI, which is now named COFF ABI. The following compelling best-in-class features are available under the C6000 EABI:GeneralZero-init globals: “int gvar;” gets set to 0 before main runs.Dynamic linking: Add code to a running system.Native ROM
  • DDR3 Design Requirements for KeyStone Devices (Rev. B)
    PDF, 582 Kb, Revision: B, Datei veröffentlicht: Jun 5, 2014
  • Multicore Programming Guide (Rev. B)
    PDF, 1.8 Mb, Revision: B, Datei veröffentlicht: Aug 29, 2012
    As application complexity continues to grow, we have reached a limit on increasing performance by merely scaling clock speed. To meet the ever-increasing processing demand, modern System-On-Chip solutions contain multiple processing cores. The dilemma is how to map applications to multicore devices. In this paper, we present a programming methodology for converting applications to run on multicore
  • Processor SDK RTOS Audio Benchmark Starter Kit
    PDF, 530 Kb, Datei veröffentlicht: Apr 12, 2017
    The TI TMS320C6000в„ў Digital Signal Processors (DSPs) have many architectural advantages that make them ideal for computation-intensive real-time applications that are commonly used in audio processing application. This application notes describes Audio Benchmark Starterkit software that is intended to provide an easy and quick way to benchmark key audio functions on C66x and C674x DSP device
  • TI DSP Benchmarking
    PDF, 62 Kb, Datei veröffentlicht: Jan 13, 2016
    This application report provides benchmarks for the C674x DSP core, the C66x DSP core and the ARMВ®CortexВ®-A15 core. This document also shows how to reproduce these benchmarks on specific hardware platforms.

Modellreihe

Herstellerklassifikation

  • Semiconductors> Processors> Digital Signal Processors> C6000 DSP + ARM Processors> 66AK2x