Datasheet Texas Instruments 66AK2E02 — Datenblatt

HerstellerTexas Instruments
Serie66AK2E02
Datasheet Texas Instruments 66AK2E02

Multicore DSP + ARM KeyStone II System-on-Chip (SoC)

Datenblätter

66AK2E05/02 Multicore DSP+ARM KeyStone II System-on-Chip (SoC) datasheet
PDF, 2.0 Mb, Revision: D, Datei veröffentlicht: Mar 11, 2015
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Preise

Status

66AK2E02ABDA4
Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

66AK2E02ABDA4
N1
Pin1089
Package TypeABD
Package QTY40
Device Marking@2012 TI
Width (mm)27
Length (mm)27
Thickness (mm)2.98
Mechanical DataHerunterladen

Parameter

Parameters / Models66AK2E02ABDA4
66AK2E02ABDA4
ARM CPU1 ARM Cortex-A15
ARM MHz, Max.1250,1400
ApplicationsAutomation and Process,Avionics and Defense,Communications and Telecom,Consumer Electronics,Industrial,Medical,Security,Space,Test and Measurement
DRAMDDR3,DDR3L
DSP1 C66x
DSP MHz, Max.1250,1400
EMAC2-Port 10Gb Switch,8-Port 1Gb Switch
Hardware AcceleratorsSecurity Accelerator
I2C3
On-Chip L2 Cache4096 KB (ARM Cluster),512 KB (per C66x DSP core)
Operating SystemsIntegrity,Linux,SYS/BIOS,VxWorks
Operating Temperature Range, C-40 to 100
Other On-Chip Memory2048 KB
PCI/PCIe4 PCIe Gen2
RatingCatalog
SPI3
UART, SCI2
USB2

Öko-Plan

66AK2E02ABDA4
RoHSCompliant

Anwendungshinweise

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  • Keystone EDMA FAQ
    PDF, 1.3 Mb, Datei veröffentlicht: Sep 1, 2016
    This document is a collection of frequently asked questions (FAQs) on enhanced direct memory access (EDMA) on KeyStoneв„ў I (KS1) and KeyStone II (KS2) devices, along with useful collateral and software reference links.
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    PDF, 54 Kb, Datei veröffentlicht: Oct 3, 2016
    This document is a collection of frequently asked questions (FAQ) on running the NDK examples on the KeyStoneв„ў family of devices.
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    PDF, 73 Kb, Datei veröffentlicht: Jan 26, 2015
    This application report provides a step-to-step initialization guide for the Keystone II device DDR3 SDRAM controller.
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    This application report analyzes various performance measurements of the KeyStone II family of processors. It provides a throughput analysis of the various support peripherals to different end-points and memory access.
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    PDF, 143 Kb, Datei veröffentlicht: Oct 16, 2015
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    PDF, 138 Kb, Datei veröffentlicht: Apr 13, 2016
    The serializer-deserializer (SerDes) performs serial-to-parallel conversions on data received from a peripheral device and parallel-to-serial conversion on data received from the CPU. This application report explains the SerDes transmit and receive parameters tuning, tools and some debug techniques for TI Keystone I and Keystone II devices.
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    PDF, 320 Kb, Datei veröffentlicht: Dec 13, 2011
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    PDF, 20 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
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    PDF, 585 Kb, Datei veröffentlicht: Nov 9, 2010
  • DDR3 Design Requirements for KeyStone Devices (Rev. B)
    PDF, 582 Kb, Revision: B, Datei veröffentlicht: Jun 5, 2014
  • Multicore Programming Guide (Rev. B)
    PDF, 1.8 Mb, Revision: B, Datei veröffentlicht: Aug 29, 2012
    As application complexity continues to grow, we have reached a limit on increasing performance by merely scaling clock speed. To meet the ever-increasing processing demand, modern System-On-Chip solutions contain multiple processing cores. The dilemma is how to map applications to multicore devices. In this paper, we present a programming methodology for converting applications to run on multicore
  • TI DSP Benchmarking
    PDF, 62 Kb, Datei veröffentlicht: Jan 13, 2016
    This application report provides benchmarks for the C674x DSP core, the C66x DSP core and the ARMВ®CortexВ®-A15 core. This document also shows how to reproduce these benchmarks on specific hardware platforms.

Modellreihe

Serie: 66AK2E02 (1)

Herstellerklassifikation

  • Semiconductors> Processors> Digital Signal Processors> C6000 DSP + ARM Processors> 66AK2x