Datasheet Texas Instruments CD74ACT112M96 — Datenblatt

HerstellerTexas Instruments
SerieCD74ACT112
ArtikelnummerCD74ACT112M96
Datasheet Texas Instruments CD74ACT112M96

Dual Negative-Edge Triggered JK Flip-Flops mit Set und Reset 16-SOIC -55 auf 125

Datenblätter

CD54ACT112, CD74ACT112 datasheet
PDF, 796 Kb, Datei veröffentlicht: Jan 17, 2003
Auszug aus dem Dokument

Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin16
Package TypeD
Industry STD TermSOIC
JEDEC CodeR-PDSO-G
Package QTY2500
CarrierLARGE T&R
Device MarkingACT112M
Width (mm)3.91
Length (mm)9.9
Thickness (mm)1.58
Pitch (mm)1.27
Max Height (mm)1.75
Mechanical DataHerunterladen

Parameter

Bits2
F @ Nom Voltage(Max)90 Mhz
ICC @ Nom Voltage(Max)0.04 mA
Output Drive (IOL/IOH)(Max)-24/24 mA
Package GroupSOIC
Package Size: mm2:W x L16SOIC: 59 mm2: 6 x 9.9(SOIC) PKG
RatingCatalog
Schmitt TriggerNo
Technology FamilyACT
VCC(Max)5.5 V
VCC(Min)4.5 V
Voltage(Nom)5 V
tpd @ Nom Voltage(Max)11.1 ns

Öko-Plan

RoHSCompliant

Anwendungshinweise

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    PDF, 34 Kb, Revision: A, Datei veröffentlicht: Feb 6, 2015
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    PDF, 43 Kb, Datei veröffentlicht: Apr 1, 1996
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Modellreihe

Herstellerklassifikation

  • Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop