Datasheet Texas Instruments TLV2542CDGK — Datenblatt

HerstellerTexas Instruments
SerieTLV2542
ArtikelnummerTLV2542CDGK
Datasheet Texas Instruments TLV2542CDGK

12-Bit-ADC mit 200 kSPS, serieller Ausgang, TMS320-kompatibel (bis zu 10 MHz), Dual Ch.

Datenblätter

2.7 V to 5.5 V Low-Power 12-Bit 140/200 KSPS, Serial Analog-To-Digital Converter datasheet
PDF, 1.2 Mb, Revision: E, Datei veröffentlicht: Apr 12, 2010
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Preise

Detaillierte Beschreibung

Auto Sweep 8-VSSOP 0 bis 70

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin8
Package TypeDGK
Industry STD TermVSSOP
JEDEC CodeR-PDSO-G
Package QTY80
CarrierTUBE
Device MarkingAHB
Width (mm)3
Length (mm)3
Thickness (mm).97
Pitch (mm).65
Max Height (mm)1.07
Mechanical DataHerunterladen

Parameter

# Input Channels2
Analog Voltage AVDD(Max)5.5 V
Analog Voltage AVDD(Min)2.7 V
ArchitectureSAR
Digital Supply(Max)5.5 V
Digital Supply(Min)2.7 V
INL(Max)1 +/-LSB
Input Range(Max)5.5 V
Input TypeSingle-Ended
Integrated FeaturesOscillator
InterfaceSPI
Multi-Channel ConfigurationMultiplexed
Operating Temperature Range-40 to 85,0 to 70 C
Package GroupVSSOP
Package Size: mm2:W x L8VSSOP: 15 mm2: 4.9 x 3(VSSOP) PKG
Power Consumption(Typ)2.8 mW
RatingCatalog
Reference ModeExt
Resolution12 Bits
SINAD72 dB
SNR72 dB
Sample Rate (max)200kSPS SPS
Sample Rate(Max)0.2 MSPS
THD(Typ)-84 dB

Öko-Plan

RoHSCompliant

Design Kits und Evaluierungsmodule

  • Evaluation Modules & Boards: 5-6KINTERFACE
    5-6K Interface Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

Anwendungshinweise

  • Interfacing the TLC2552 and TLV2542 to the MSP430F149
    PDF, 123 Kb, Datei veröffentlicht: Feb 10, 2003
    This application note discusses the features of the TLC2552 and TLV2542 ADC. An SPI interface code example for the MSP430F149 to the TLC2552 ADC, and for the MSP430F149 to the TLV2542 ADC, are also presented.
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Modellreihe

Herstellerklassifikation

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)