Datasheet Texas Instruments SN74LVT125DBLE — Datenblatt

HerstellerTexas Instruments
SerieSN74LVT125
ArtikelnummerSN74LVT125DBLE
Datasheet Texas Instruments SN74LVT125DBLE

3,3-V-ABT-Vierfachbuspuffer mit 3-Zustands-Ausgängen 14-SSOP -40 bis 85

Datenblätter

SN74LVT125 datasheet
PDF, 673 Kb, Revision: F, Datei veröffentlicht: Oct 13, 2003
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Preise

Status

Lifecycle StatusObsolete (Manufacturer has discontinued the production of the device)
Manufacture's Sample AvailabilityNo

Verpackung

Pin14
Package TypeDB
Industry STD TermSSOP
JEDEC CodeR-PDSO-G
Width (mm)5.3
Length (mm)6.2
Thickness (mm)1.95
Pitch (mm).65
Max Height (mm)2
Mechanical DataHerunterladen

Ersatz

ReplacementSN74LVT125DBR
Replacement CodeS

Parameter

Approx. Price (US$)0.52 | 1ku
Bits(#)4
F @ Nom Voltage(Max)(Mhz)100
ICC @ Nom Voltage(Max)(mA)0.007
Input TypeTTL/CMOS
Operating Temperature Range(C)-40 to 85
Output Drive (IOL/IOH)(Max)(mA)-32/64
Output TypeLVTTL
Package GroupSSOP
Package Size: mm2:W x L (PKG)14TSSOP: 32 mm2: 6.4 x 5(TSSOP)
RatingCatalog
Schmitt TriggerNo
Technology FamilyLVT
VCC(Max)(V)3.6
VCC(Min)(V)2.7
Voltage(Nom)(V)3.3
tpd @ Nom Voltage(Max)(ns)4

Öko-Plan

RoHSNot Compliant
Pb FreeNo

Anwendungshinweise

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, Revision: A, Datei veröffentlicht: Mar 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, Datei veröffentlicht: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

Modellreihe

Herstellerklassifikation

  • Semiconductors > Logic > Buffer/Driver/Transceiver > Non-Inverting Buffer/Driver