Datasheet Texas Instruments ADS8372IBRHPRG4 — Datenblatt

HerstellerTexas Instruments
SerieADS8372
ArtikelnummerADS8372IBRHPRG4
Datasheet Texas Instruments ADS8372IBRHPRG4

Serieller 16-Bit-600KSPS-ADC mit ref- und pseudobipolarem, vollständig differenziellem Eingang 28-VQFN -40 bis 85

Datenblätter

16-Bit 600-kHz Fully Diff Pseudo-Bipolar Input Micropower Sampling ADC datasheet
PDF, 1.3 Mb, Datei veröffentlicht: Jun 24, 2005
Auszug aus dem Dokument

Preise

Status

Lifecycle StatusObsolete (Manufacturer has discontinued the production of the device)
Manufacture's Sample AvailabilityNo

Verpackung

Pin28
Package TypeRHP
Industry STD TermVQFN
JEDEC CodeS-PQFP-N
Width (mm)6
Length (mm)6
Thickness (mm).9
Pitch (mm).65
Max Height (mm)1
Mechanical DataHerunterladen

Parameter

# Input Channels1
Analog Voltage AVDD(Max)(V)5.25
Analog Voltage AVDD(Min)(V)4.75
Approx. Price (US$)10.50 | 1ku
ArchitectureSAR
Digital Supply(Max)(V)5.25
Digital Supply(Min)(V)2.7
INL(Max)(+/-LSB)0.75
Input Range(Max)(V)4.096
Input TypeDifferential
Integrated FeaturesOscillator
InterfaceSerial I2C
Multi-Channel ConfigurationN/A
Operating Temperature Range(C)-40 to 85
Package GroupVQFN
Package Size: mm2:W x L (PKG)28VQFN: 36 mm2: 6 x 6(VQFN)
Power Consumption(Typ)(mW)110
RatingCatalog
Reference ModeExt
Int
Resolution(Bits)16
SINAD(dB)93.5
SNR(dB)93.5
Sample Rate (max)(SPS)600kSPS
THD(Typ)(dB)-116

Öko-Plan

RoHSNot Compliant
Pb FreeNo

Design Kits und Evaluierungsmodule

  • Evaluation Modules & Boards: ADS8372EVM
    ADS8372EVM Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

Anwendungshinweise

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Modellreihe

Herstellerklassifikation

  • Semiconductors > Data Converters > Analog to Digital Converter > Precision ADC (<=10MSPS)