Datasheet Texas Instruments ADS8328IBPWG4 — Datenblatt

HerstellerTexas Instruments
SerieADS8328
ArtikelnummerADS8328IBPWG4
Datasheet Texas Instruments ADS8328IBPWG4

2,7 V ~ 5,5 V, serieller 16-Bit-ADKS mit 500 ksPS und 2-zu-1-MUX 16-TSSOP -40 bis 85

Datenblätter

Low Power, 16-Bit, 500-kHz, Single/Dual Unipolar Input, ADC w/Serial I/F datasheet
PDF, 1.8 Mb, Revision: E, Datei veröffentlicht: Jan 27, 2011
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Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin161616
Package TypePWPWPW
Industry STD TermTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY909090
CarrierTUBETUBETUBE
Device MarkingADSB8328I A
Width (mm)4.44.44.4
Length (mm)555
Thickness (mm)111
Pitch (mm).65.65.65
Max Height (mm)1.21.21.2
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Parameter

# Input Channels2
Analog Voltage AVDD(Max)5.5 V
Analog Voltage AVDD(Min)2.7 V
ArchitectureSAR
Digital Supply(Max)5.5 V
Digital Supply(Min)1.65 V
INL(Max)2 +/-LSB
Input Range(Max)5.5 V
Input TypeDifferential,Single-Ended
Integrated FeaturesDaisy-Chainable,Oscillator
InterfaceSPI
Multi-Channel ConfigurationMultiplexed
Operating Temperature Range-40 to 85 C
Package GroupTSSOP
Package Size: mm2:W x L16TSSOP: 32 mm2: 6.4 x 5(TSSOP) PKG
Power Consumption(Typ)10.6 mW
RatingCatalog
Reference ModeExt
Resolution16 Bits
SINAD91 dB
SNR91 dB
Sample Rate (max)500kSPS SPS
Sample Rate(Max)0.5 MSPS
THD(Typ)-98 dB

Öko-Plan

RoHSCompliant

Anwendungshinweise

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, Datei veröffentlicht: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, Datei veröffentlicht: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, Datei veröffentlicht: Apr 16, 2015

Modellreihe

Herstellerklassifikation

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)