ADC12DC105
www.ti.com SNAS469B – SEPTEMBER 2008 – REVISED MARCH 2013 ADC12DC105 Dual 12-Bit, 105 MSPS A/D Converter with CMOS Outputs
Check for Samples: ADC12DC105 FEATURES DESCRIPTION The ADC12DC105 is a high-performance CMOS
analog-to-digital converter capable of converting two
analog input signals into 12-bit digital words at rates
up to 105 Mega Samples Per Second (MSPS). These
converters use a differential, pipelined architecture
with digital error correction and an on-chip sampleand-hold circuit to minimize power consumption and
the external component count, while providing
excellent dynamic performance. A unique sampleand-hold stage yields a full-power bandwidth of 1
GHz. The ADC12DC080/105 may be operated from a
single +3.0V or +3.3V power supply. A power-down
feature reduces the power consumption to very low
levels while still allowing fast wake-up time to full
operation. The differential inputs provide a 2V full
scale differential input swing. A stable 1.2V internal
voltage reference is provided, or the ADC12DC105
can be operated with an external 1.2V reference.
Output data format (offset binary versus 2's
complement) and duty cycle stabilizer are pinselectable. The duty cycle stabilizer maintains
performance over a wide range of clock duty cycles. 1 2 Internal Sample-and-Hold Circuit and Precision
Reference
Low Power Consumption …
