Datasheet Texas Instruments CD4027BMT — Datenblatt

HerstellerTexas Instruments
SerieCD4027B
ArtikelnummerCD4027BMT
Datasheet Texas Instruments CD4027BMT

CMOS Dual JK Master-Slave Flip-Flop 16-SOIC -55 bis 125

Datenblätter

CD4027B TYPES datasheet
PDF, 1.5 Mb, Revision: C, Datei veröffentlicht: Oct 14, 2003
Auszug aus dem Dokument

Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin16
Package TypeD
Industry STD TermSOIC
JEDEC CodeR-PDSO-G
Package QTY250
CarrierSMALL T&R
Device MarkingCD4027BM
Width (mm)3.91
Length (mm)9.9
Thickness (mm)1.58
Pitch (mm)1.27
Max Height (mm)1.75
Mechanical DataHerunterladen

Parameter

Bits2
F @ Nom Voltage(Max)8 Mhz
ICC @ Nom Voltage(Max)0.06 mA
Output Drive (IOL/IOH)(Max)-1.5/1.5 mA
Package GroupSOIC
Package Size: mm2:W x L16SOIC: 59 mm2: 6 x 9.9(SOIC) PKG
RatingCatalog
Schmitt TriggerNo
Technology FamilyCD4000
VCC(Max)18 V
VCC(Min)3 V
Voltage(Nom)10 V
tpd @ Nom Voltage(Max)130 ns

Öko-Plan

RoHSCompliant

Anwendungshinweise

  • Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics
    PDF, 188 Kb, Datei veröffentlicht: Dec 3, 2001
    Both buffered and unbuffered CMOS B-series gates inverters and high-current IC products are available from TI. Each product classification has application advantages in appropriate logic-system designs. Many CMOS suppliers have concentrated on promoting buffered B-series products with applications literature focusing on the attributes and use of the buffered types. This practice has left an imb
  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revision: A, Datei veröffentlicht: Feb 6, 2015

Modellreihe

Herstellerklassifikation

  • Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop