Datasheet Texas Instruments SN74LVC112ADBLE — Datenblatt

HerstellerTexas Instruments
SerieSN74LVC112A
ArtikelnummerSN74LVC112ADBLE
Datasheet Texas Instruments SN74LVC112ADBLE

Dual Negative-Edge-Triggered JK Flip-Flop mit klarem und voreingestelltem 16-SSOP -40 bis 85

Datenblätter

SN74LVC112A Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset datasheet
PDF, 980 Kb, Revision: M, Datei veröffentlicht: Dec 26, 2014
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Anwendungshinweise

  • LVC Characterization Information
    PDF, 114 Kb, Datei veröffentlicht: Dec 1, 1996
    This document provides characterization information about low-voltage logic (LVL) that operates from a 3.3-V power supply. It addresses the issues of interfacing to 5-V logic ac performance power considerations input and output characteristics and signal integrity for this family of devices.
  • Use of the CMOS Unbuffered Inverter in Oscillator Circuits
    PDF, 796 Kb, Datei veröffentlicht: Nov 6, 2003
    CMOS devices have a high input impedance high gain and high bandwidth. These characteristics are similar to ideal amplifier characteristics and hence a CMOS buffer or inverter can be used in an oscillator circuit in conjunction with other passive components. Now CMOS oscillator circuits are widely used in high-speed applications because they are economical easy to use and take significantly

Modellreihe

Herstellerklassifikation

  • Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop