Datasheet Texas Instruments ADS8482IBRGZT — Datenblatt

HerstellerTexas Instruments
SerieADS8482
ArtikelnummerADS8482IBRGZT
Datasheet Texas Instruments ADS8482IBRGZT

18 Bit 1MSPS Parallel ADC W / Ref, Pseudo-Bipolar, volldifferenzieller Eingang 48-VQFN -40 bis 85

Datenblätter

18-Bit 1-MSPS Differential Input, Micropower Samp Analog-to-Digital Converter datasheet
PDF, 1.2 Mb, Revision: A, Datei veröffentlicht: Jun 6, 2006
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Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin484848
Package TypeRGZRGZRGZ
Industry STD TermVQFNVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY250250250
CarrierSMALL T&RSMALL T&RSMALL T&R
Device Marking8482IADSB
Width (mm)777
Length (mm)777
Thickness (mm).9.9.9
Pitch (mm).5.5.5
Max Height (mm)111
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Parameter

# Input Channels1
Analog Voltage AVDD(Max)5.25 V
Analog Voltage AVDD(Min)4.75 V
ArchitectureSAR
Digital Supply(Max)5.25 V
Digital Supply(Min)2.7 V
INL(Max)2.5 +/-LSB
Input Range(Max)4.096 V
Input Range(Min)4.096 V
Input TypeDifferential
Integrated FeaturesOscillator
InterfaceParallel
Multi-Channel ConfigurationN/A
Operating Temperature Range-40 to 85 C
Package GroupVQFN
Package Size: mm2:W x L48VQFN: 49 mm2: 7 x 7(VQFN) PKG
Power Consumption(Typ)225 mW
RatingCatalog
Reference ModeExt,Int
Resolution18 Bits
SINAD99 dB
SNR99 dB
Sample Rate (max)1MSPS SPS
Sample Rate(Max)1 MSPS
THD(Typ)-121 dB

Öko-Plan

RoHSCompliant

Design Kits und Evaluierungsmodule

  • Evaluation Modules & Boards: ADS8482EVM
    ADS8482EVM Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

Anwendungshinweise

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Modellreihe

Serie: ADS8482 (2)

Herstellerklassifikation

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)