Datasheet Texas Instruments CD4072BM96G4 — Datenblatt

HerstellerTexas Instruments
SerieCD4072B
ArtikelnummerCD4072BM96G4
Datasheet Texas Instruments CD4072BM96G4

CMOS Dual 4-Input OR Gate 14-SOIC -55 bis 125

Datenblätter

CD4071B, CD4072B, CD4075B TYPES datasheet
PDF, 1.7 Mb, Revision: D, Datei veröffentlicht: Aug 21, 2003
Auszug aus dem Dokument

Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

Verpackung

Pin14
Package TypeD
Industry STD TermSOIC
JEDEC CodeR-PDSO-G
Package QTY2500
CarrierLARGE T&R
Device MarkingCD4072BM
Width (mm)3.91
Length (mm)8.65
Thickness (mm)1.58
Pitch (mm)1.27
Max Height (mm)1.75
Mechanical DataHerunterladen

Parameter

Bits2
F @ Nom Voltage(Max)8 Mhz
ICC @ Nom Voltage(Max)0.015 mA
IOH(Max)-1.5 mA
IOL(Max)1.5 mA
Operating Temperature Range-55 to 125 C
Package GroupSOIC
Package Size: mm2:W x L14SOIC: 52 mm2: 6 x 8.65(SOIC) PKG
RatingCatalog
Schmitt TriggerNo
Technology FamilyCD4000
VCC(Max)18 V
VCC(Min)3 V
Voltage(Nom)10 V
tpd @ Nom Voltage(Max)120 ns

Öko-Plan

RoHSCompliant

Anwendungshinweise

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    PDF, 188 Kb, Datei veröffentlicht: Dec 3, 2001
    Both buffered and unbuffered CMOS B-series gates inverters and high-current IC products are available from TI. Each product classification has application advantages in appropriate logic-system designs. Many CMOS suppliers have concentrated on promoting buffered B-series products with applications literature focusing on the attributes and use of the buffered types. This practice has left an imb
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Kb, Datei veröffentlicht: Jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Kb, Revision: C, Datei veröffentlicht: Dec 2, 2015
  • Introduction to Logic
    PDF, 93 Kb, Datei veröffentlicht: Apr 30, 2015

Modellreihe

Herstellerklassifikation

  • Semiconductors > Logic > Gate > OR Gate