Datasheet Texas Instruments ADS6124IRHBR — Datenblatt

HerstellerTexas Instruments
SerieADS6124
ArtikelnummerADS6124IRHBR
Datasheet Texas Instruments ADS6124IRHBR

12-Bit-Analog-Digital-Wandler (ADC) mit 105 MSPS, 32-VQFN -40 bis 85

Datenblätter

12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS and CMOS OUTPUTS datasheet
PDF, 2.4 Mb, Revision: A, Datei veröffentlicht: Dec 4, 2007
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Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin32
Package TypeRHB
Industry STD TermVQFN
JEDEC CodeS-PQFP-N
Package QTY3000
CarrierLARGE T&R
Device MarkingAZ6124
Width (mm)5
Length (mm)5
Thickness (mm).9
Pitch (mm).5
Max Height (mm)1
Mechanical DataHerunterladen

Parameter

# Input Channels1
Analog Input BW500 MHz
ArchitecturePipeline
DNL(Max)2 +/-LSB
DNL(Typ)0.6 +/-LSB
ENOB11.5 Bits
INL(Max)2 +/-LSB
INL(Typ)1 +/-LSB
Input BufferNo
Input Range2 Vp-p
InterfaceDDR LVDS,Parallel CMOS
Operating Temperature Range-40 to 85 C
Package GroupVQFN
Package Size: mm2:W x L32VQFN: 25 mm2: 5 x 5(VQFN) PKG
Power Consumption(Typ)374 mW
RatingCatalog
Reference ModeExt,Int
Resolution12 Bits
SFDR83 dB
SINAD71 dB
SNR71.3 dB
Sample Rate(Max)105 MSPS

Öko-Plan

RoHSCompliant

Design Kits und Evaluierungsmodule

  • Evaluation Modules & Boards: ADS6144EVM
    ADS6144 14-Bit, 105-MSPS Analog-to-Digital Converter Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADS6124EVM
    ADS6124 12-Bit, 105-MSPS Analog-to-Digital Converter Evaluation Module
    Lifecycle Status: Obsolete (Manufacturer has discontinued the production of the device)
  • Evaluation Modules & Boards: TSW2200EVM
    TSW2200 Low-Cost Portable Power Supply Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: TSW1405EVM
    Data Capture: Data Converter EVMs With 8 LVDS Lanes up to 1.0Gbps
    Lifecycle Status: Active (Recommended for new designs)

Anwendungshinweise

  • Band-Pass Filter Design Techniques for High-Speed ADCs
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    Several well-known methods exist for designing passive inductor-capacitor (LC) filters with resistive load terminations. However, when LC filters are used to drive the analog input pins of a high-speed analog-to-digital converter (ADC), special consideration must be given to the ADC input impedance. Not accounting for the ADC input impedance often results in a filter design that does not meet the
  • QFN Layout Guidelines
    PDF, 1.3 Mb, Datei veröffentlicht: Jul 28, 2006
    Board layout and stencil information for most Texas Instruments Quad Flat No-Lead (QFN) devices is provided in their data sheets. This document helps printed-circuit board designers understand and better use this information for optimal designs.
  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Kb, Datei veröffentlicht: Sep 4, 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)
    PDF, 1.2 Mb, Revision: A, Datei veröffentlicht: Jul 19, 2013
  • Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)
    PDF, 2.0 Mb, Revision: A, Datei veröffentlicht: May 22, 2015
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, Datei veröffentlicht: Apr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Kb, Revision: A, Datei veröffentlicht: Sep 10, 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Datei veröffentlicht: Jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Datei veröffentlicht: Jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, Datei veröffentlicht: Apr 16, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, Datei veröffentlicht: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, Datei veröffentlicht: May 18, 2015

Modellreihe

Serie: ADS6124 (2)

Herstellerklassifikation

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)