Datasheet Texas Instruments LMK04808BISQ/NOPB — Datenblatt

HerstellerTexas Instruments
SerieLMK04808
ArtikelnummerLMK04808BISQ/NOPB
Datasheet Texas Instruments LMK04808BISQ/NOPB

Rauscharmer Clock Jitter Cleaner mit Dual Loop PLLs und integriertem 2,9 GHz VCO 64-WQFN -40 bis 85

Datenblätter

LMK0480x Low-Noise Clock Jitter Cleaner with Dual Loop PLLs datasheet
PDF, 2.1 Mb, Revision: K, Datei veröffentlicht: Dec 24, 2014
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Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin64
Package TypeNKD
Industry STD TermWQFN
JEDEC CodeS-PQFP-N
Package QTY1000
CarrierLARGE T&R
Device MarkingK04808BISQ
Width (mm)9
Length (mm)9
Pitch (mm).5
Max Height (mm).8
Mechanical DataHerunterladen

Parameter

Number of Inputs2
Number of Outputs14
Operating Temperature Range-40 to 85 C
Output Frequency(Max)3072 MHz
Output Frequency(Min)0.22 MHz
Output LevelLVCMOS,LVDS,LVPECL
Package GroupWQFN
Package Size: mm2:W x L64WQFN: 81 mm2: 9 x 9(WQFN) PKG
RMS Jitter0.111
RatingCatalog
Special FeaturesuWire,SPI,Holdover mode,Manual/auto switch,Int. xtal oscillator
Supply Voltage(Max)3.45 V
Supply Voltage(Min)3.15 V
VCO Frequency(Max)3072 MHz
VCO Frequency(Min)2750 MHz

Öko-Plan

RoHSCompliant

Design Kits und Evaluierungsmodule

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Anwendungshinweise

  • Using the LMK0480x/LMK04906 for Hitless Switching and Holdover
    PDF, 3.8 Mb, Datei veröffentlicht: Jul 12, 2013
    This application report discusses some of the key performance results when using LMK0480x/LMK04906to implement hitless switching between reference clocks. Hitless Switching is required in certainapplications such as SONET/SDH/line port cards and routers/switchers in order to minimize thepropagation of phase transients to the clock outputs during reference clock switching. On loss of all vali
  • Effects of Clock Noise on High Speed DAC Performance
    PDF, 674 Kb, Datei veröffentlicht: Nov 8, 2012

Modellreihe

Serie: LMK04808 (3)

Herstellerklassifikation

  • Semiconductors > Clock and Timing > Clock Jitter Cleaners > Dual / Cascaded PLL