Datasheet Texas Instruments CD4020BPW — Datenblatt

HerstellerTexas Instruments
SerieCD4020B
ArtikelnummerCD4020BPW
Datasheet Texas Instruments CD4020BPW

CMOS 14-stufiger Ripple-Carry-Binärzähler / Teiler 16-TSSOP -55 bis 125

Datenblätter

CD4020B, CD4024B, CD4040B TYPES datasheet
PDF, 1.6 Mb, Revision: D, Datei veröffentlicht: Dec 11, 2003
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Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin16
Package TypePW
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY90
CarrierTUBE
Device MarkingCM020B
Width (mm)4.4
Length (mm)5
Thickness (mm)1
Pitch (mm)0.65
Max Height (mm)1.2
Mechanical DataHerunterladen

Parameter

Approx. price0.11 | 1ku US$
Bits12
F @ nom voltage(Max)8 MHz
FunctionCounter
ICC @ nom voltage(Max)0.03 mA
IOH(Max)-1.5 mA
IOL(Max)1.5 mA
Operating temperature range-55 to 125 C
Package GroupPDIP|16,SO|16,TSSOP|16
Package size: mm2:W x LSee datasheet (PDIP),16SO: 80 mm2: 7.8 x 10.2 (SO|16),16TSSOP: 22 mm2: 4.4 x 5 (TSSOP|16) PKG
RatingCatalog
Technology FamilyCD4000
TypeBinary
VCC(Max)18 V
VCC(Min)3 V
Voltage(Nom)5,10,15 V
tpd @ nom Voltage(Max)160 ns

Öko-Plan

RoHSCompliant
Pb FreeYes

Design Kits und Evaluierungsmodule

  • Evaluation Modules & Boards: 14-24-LOGIC-EVM
    Generic Logic EVM Supporting 14 through 24 Pin PW; DB; D; DW; NS; P; N; and DGV Packages
    Lifecycle Status: Active (Recommended for new designs)

Anwendungshinweise

  • Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics
    PDF, 188 Kb, Datei veröffentlicht: Dec 3, 2001
    Both buffered and unbuffered CMOS B-series gates inverters and high-current IC products are available from TI. Each product classification has application advantages in appropriate logic-system designs. Many CMOS suppliers have concentrated on promoting buffered B-series products with applications literature focusing on the attributes and use of the buffered types. This practice has left an imb
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Kb, Datei veröffentlicht: Jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Kb, Revision: C, Datei veröffentlicht: Dec 2, 2015

Modellreihe

Herstellerklassifikation

  • Semiconductors > Logic > Specialty logic > Counter/arithmetic/parity function