Datasheet Texas Instruments TLV2553IPWG4 — Datenblatt

HerstellerTexas Instruments
SerieTLV2553
ArtikelnummerTLV2553IPWG4
Datasheet Texas Instruments TLV2553IPWG4

12-Bit, 200 KSPS, 11-Kanal, geringer Stromverbrauch, serieller ADC-serieller Ausgang, mit Pwrdwn 20-TSSOP -40 bis 85

Datenblätter

TLV2553 12-Bit, 200-KSPS, 11-Channel, Low-Power, Serial ADC datasheet
PDF, 1.2 Mb, Revision: C, Datei veröffentlicht: Jul 9, 2015
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Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

Verpackung

Pin20
Package TypePW
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY70
CarrierTUBE
Device MarkingTY2553
Width (mm)4.4
Length (mm)6.5
Thickness (mm)1
Pitch (mm).65
Max Height (mm)1.2
Mechanical DataHerunterladen

Parameter

# Input Channels11
Analog Voltage AVDD(Max)5.5 V
Analog Voltage AVDD(Min)2.7 V
ArchitectureSAR
Digital Supply(Max)5.5 V
Digital Supply(Min)2.7 V
INL(Max)1 +/-LSB
Input Range(Max)5.5 V
Input TypeSingle-Ended
Integrated FeaturesOscillator
InterfaceSPI
Multi-Channel ConfigurationMultiplexed
Operating Temperature Range-40 to 85 C
Package GroupTSSOP
Package Size: mm2:W x L20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) PKG
Power Consumption(Typ)2.43 mW
RatingCatalog
Reference ModeExt
Resolution12 Bits
SINAD69.5 dB
SNR69.5 dB
Sample Rate (max)200kSPS SPS
Sample Rate(Max)0.2 MSPS

Öko-Plan

RoHSCompliant

Design Kits und Evaluierungsmodule

  • Evaluation Modules & Boards: TLV2553EVM-PDK
    TLV2553 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: 5-6KINTERFACE
    5-6K Interface Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

Anwendungshinweise

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Modellreihe

Herstellerklassifikation

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)