Datasheet Texas Instruments TMS320C6457CGMHA — Datenblatt

HerstellerTexas Instruments
SerieTMS320C6457
ArtikelnummerTMS320C6457CGMHA
Datasheet Texas Instruments TMS320C6457CGMHA

Kommunikationsinfrastruktur Digitaler Signalprozessor 688-FCBGA -40 bis 100

Datenblätter

TMS320C6457 Communications Infrastructure Digital Signal Processor datasheet
PDF, 2.6 Mb, Revision: B, Datei veröffentlicht: Jul 9, 2010
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Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin688688688
Package TypeGMHGMHGMH
Device Marking@2007 TIA1GHZTMS320C6457CGMH
Width (mm)232323
Length (mm)232323
Thickness (mm)2.352.352.35
Mechanical DataHerunterladenHerunterladenHerunterladen

Öko-Plan

RoHSSee ti.com

Design Kits und Evaluierungsmodule

  • JTAG Emulators/ Analyzers: TMDSEMU560V2STM-UE
    XDS560v2 System Trace USB & Ethernet Debug Probe
    Lifecycle Status: Active (Recommended for new designs)
  • JTAG Emulators/ Analyzers: TMDSEMU560V2STM-U
    XDS560v2 System Trace USB Debug Probe
    Lifecycle Status: Active (Recommended for new designs)
  • JTAG Emulators/ Analyzers: TMDSEMU200-U
    XDS200 USB Debug Probe
    Lifecycle Status: Active (Recommended for new designs)
  • Development Kits: TMDSEVM6472
    TMS320C6472 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

Anwendungshinweise

  • TMS320C6457/TMS320TCI6484/TMS320TCI6487/88 DDR2 Implementation Guidelines (Rev. D)
    PDF, 139 Kb, Revision: D, Datei veröffentlicht: Jan 28, 2010
    This document provides implementation instructions for the DDR2 interface contained on the C6457/TCI6484/TCI6487/88 DSP.
  • TMS320TCI6484 and TMS320C6457 SERDES Implementation Guidelines (Rev. A)
    PDF, 245 Kb, Revision: A, Datei veröffentlicht: Oct 8, 2009
    This document contains implementation instructions for the two serializer/deserializer-based interfaces (SerDes) on the TMS320TCI6484 and TMS320C6457 DSP devices:Serial RapidIOВ® (SRIO)Serial Gigabit Media Independent Interface (SGMII)
  • TMS320TCI6484 and TMS320C6457 DSPs Hardware Design Guide (Rev. B)
    PDF, 648 Kb, Revision: B, Datei veröffentlicht: Oct 8, 2009
    This application note describes hardware system design considerations for the TMS320TCI6484 and TMS320C6457 DSPs.
  • TMS320C6457 Power Consumption Application Report (Rev. A)
    PDF, 180 Kb, Revision: A, Datei veröffentlicht: Mar 25, 2011
    This document discusses the power consumption of the Texas Instruments TMS320C6457 digital signal processor (DSP). The power consumption of the device is highly application-dependent. Therefore, a power spreadsheet that estimates power consumption is provided along with this application report. This spreadsheet can be used to model power consumption for user applications such as power supply desig
  • Tuning VCP2 and TCP2 Bit Error Rate Performance
    PDF, 293 Kb, Datei veröffentlicht: Feb 11, 2011
    In most customer applications, a high level of decoding bit error rate (BER) performance is required. Since Convolutional codes and Turbo codes are widely used in wireless communication systems, TI DSPs integrate two high-performance embedded coprocessors (enhanced Viterbi decoder coprocessor and enhanced Turbo decoder coprocessor) that significantly speed up channel-decoding operations on-chip.
  • Error Detection and Correction Mechanism of TMS320C64x+/C674x (Rev. A)
    PDF, 80 Kb, Revision: A, Datei veröffentlicht: Jul 19, 2013
    This application report describes the error detection and correction mechanism of the C64x+/C674x megamodule L1P and L2 memories implemented on some devices. Depending on the type of application, these mechanisms are used to either provide diagnostic measures to detect faults in the memory that could lead to unacceptable risk for the user or to increase the availability of the system.
  • TMS320C64x to TMS320C64x+ CPU Migration Guide (Rev. A)
    PDF, 310 Kb, Revision: A, Datei veröffentlicht: Oct 20, 2005
    This document describes migration from the Texas Instruments TMS320C64xв„ў digital signal processor (DSP) to the TMS320C64x+в„ў DSP. The objective of this document is to indicate differences between the two cores and to briefly describe new features. Functionality in the devices that is identical is not included. For detailed information about either device, see the TMS320C64x/C64x+ DSP
  • Introduction to TMS320C6000 DSP Optimization
    PDF, 535 Kb, Datei veröffentlicht: Oct 6, 2011
    The TMS320C6000™ Digital Signal Processors (DSPs) have many architectural advantages that make them ideal for computation-intensive real-time applications. However to fully leverage the architectural features that C6000™ processors offer code optimization may be required. First this document reviews five key concepts in understanding the C6000 DSP architecture and optimization. Then

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Herstellerklassifikation

  • Semiconductors > Processors > Digital Signal Processors > C6000 DSP > Other C6000 DSP