Datasheet Texas Instruments SN74S51N3 — Datenblatt

HerstellerTexas Instruments
SerieSN74S51
ArtikelnummerSN74S51N3
Datasheet Texas Instruments SN74S51N3

Dual 2-breite 2-Eingänge UND-ODER-Invertierungsgatter 14-PDIP 0 bis 70

Datenblätter

AND-OR-Invert Gates datasheet
PDF, 1.1 Mb, Datei veröffentlicht: Mar 1, 1988
Auszug aus dem Dokument

Preise

Status

Lifecycle StatusObsolete (Manufacturer has discontinued the production of the device)
Manufacture's Sample AvailabilityNo

Verpackung

Pin14
Package TypeN
Industry STD TermPDIP
JEDEC CodeR-PDIP-T
Width (mm)6.35
Length (mm)19.3
Thickness (mm)3.9
Pitch (mm)2.54
Max Height (mm)5.08
Mechanical DataHerunterladen

Parameter

Approx. Price (US$)0.57 | 1ku
Bits(#)2
F @ Nom Voltage(Max)(Mhz)50
ICC @ Nom Voltage(Max)(mA)0.008
Input TypeTTL
Operating Temperature Range(C)0 to 70
Output Drive (IOL/IOH)(Max)(mA)0.4/-16
Output TypeTTL
Package GroupPDIP
Package Size: mm2:W x L (PKG)See datasheet (PDIP)
RatingCatalog
Schmitt TriggerNo
Technology FamilyS
VCC(Max)(V)5.25
VCC(Min)(V)4.75
Voltage(Nom)(V)5
tpd @ Nom Voltage(Max)(ns)22

Öko-Plan

RoHSNot Compliant
Pb FreeNo

Modellreihe

Herstellerklassifikation

  • Semiconductors > Logic > Gate > Combination Gate