Datasheet Texas Instruments TLV1548QDBRG4Q1 — Datenblatt

HerstellerTexas Instruments
SerieTLV1548-Q1
ArtikelnummerTLV1548QDBRG4Q1
Datasheet Texas Instruments TLV1548QDBRG4Q1

Kfz-Niederspannungs-10-Bit-Analog-Digital-Wandler mit serieller Steuerung und 8 Analogeingängen 20-SSOP -40 bis 125

Datenblätter

Low-Voltage 10-Bit Analog-to-Digital Converter w/Serial Control & 8 Analog Input datasheet
PDF, 532 Kb, Revision: B, Datei veröffentlicht: Apr 30, 2008
Auszug aus dem Dokument

Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

Verpackung

Pin20
Package TypeDB
Industry STD TermSSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device Marking1548Q1
Width (mm)5.3
Length (mm)7.2
Thickness (mm)1.95
Pitch (mm).65
Max Height (mm)2
Mechanical DataHerunterladen

Parameter

# Input Channels8
Analog Voltage AVDD(Max)5.5 V
Analog Voltage AVDD(Min)2.7 V
ArchitectureSAR
Digital Supply(Max)5.5 V
Digital Supply(Min)2.7 V
INL(Max)1 +/-LSB
Input Range(Max)5.5 V
Input TypeSingle-Ended
Integrated FeaturesN/A
InterfaceSPI
Multi-Channel ConfigurationMultiplexed
Operating Temperature Range-40 to 125 C
Package GroupSSOP
Package Size: mm2:W x L20SSOP: 56 mm2: 7.8 x 7.2(SSOP) PKG
Power Consumption(Typ)1.05 mW
RatingAutomotive
Reference ModeExt
Resolution10 Bits
SINADN/A dB
Sample Rate (max)85kSPS SPS
Sample Rate(Max)0.085 MSPS
THD(Typ)N/A dB

Öko-Plan

RoHSCompliant

Anwendungshinweise

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Modellreihe

Serie: TLV1548-Q1 (2)

Herstellerklassifikation

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)